Messages in this thread | | | Date | Tue, 30 Nov 2021 14:48:25 -0800 | From | "Paul E. McKenney" <> | Subject | Re: [PATCH v3 2/2] x86/tsc: skip tsc watchdog checking for qualified platforms |
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On Tue, Nov 30, 2021 at 10:55:45PM +0100, Thomas Gleixner wrote: > On Tue, Nov 30 2021 at 12:47, Paul E. McKenney wrote: > > On Tue, Nov 30, 2021 at 09:39:32PM +0100, Thomas Gleixner wrote: > >> Seriously. Jiffies is not usable as watchdog simply because lost ticks > >> cannot be compensated and you cannot use TSC to bridge them because you > >> are not trusting TSC. This is simply a circulus vitiosus. > > > > OK, HPET or nothing, then. > > Older machines also have pm_timer. But those beasts seem to have lost > that too.
I suppose that one way of avoiding clock-skew messages is to have only one clock.
> >> We really need to remove the watchdog requirement for modern hardware. > >> Let me stare at those patches and get them merged. > > > > You are more trusting of modern hardware than I am, but for all I know, > > maybe rightfully so. ;-) > > Well, I rather put a bet on the hardware, which has become reasonable > over the last decade, than on trying to solve a circular dependency > problem with tons of heuristics which won't ever work correctly.
Use of HPET to check the interval length would not be circular, right?
> TSC_ADJUST is a reasonable safety net and since its invention the amount > of BIOS wreckage has been massively reduced. Seems the nastigram in > dmesg when detecting a change in TSC_ADJUST had an effect or maybe > Microsoft enforces a tinkerfree TSC by now and we get the benefit. :) > > I still wish to have a knob to lock down TSC to read only, but that's > probably for christmas 2030 or later. :)
Indeed. How would BIOS writers hide their SMI handlers? :-/
Thanx, Paul
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