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    Subject[PATCH 5.15 182/279] perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
    Date
    From: Alexander Antonov <alexander.antonov@linux.intel.com>

    [ Upstream commit e324234e0aa881b7841c7c713306403e12b069ff ]

    According Uncore Reference Manual: any of the CHA events may be filtered
    by Thread/Core-ID by using tid modifier in CHA Filter 0 Register.
    Update skx_cha_hw_config() to follow Uncore Guide.

    Fixes: cd34cd97b7b4 ("perf/x86/intel/uncore: Add Skylake server uncore support")
    Signed-off-by: Alexander Antonov <alexander.antonov@linux.intel.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
    Link: https://lore.kernel.org/r/20211115090334.3789-2-alexander.antonov@linux.intel.com
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/x86/events/intel/uncore_snbep.c | 3 +++
    1 file changed, 3 insertions(+)

    diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
    index eb2c6cea9d0d5..e5ee6bb62ef50 100644
    --- a/arch/x86/events/intel/uncore_snbep.c
    +++ b/arch/x86/events/intel/uncore_snbep.c
    @@ -3608,6 +3608,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
    struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
    struct extra_reg *er;
    int idx = 0;
    + /* Any of the CHA events may be filtered by Thread/Core-ID.*/
    + if (event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN)
    + idx = SKX_CHA_MSR_PMON_BOX_FILTER_TID;

    for (er = skx_uncore_cha_extra_regs; er->msr; er++) {
    if (er->event != (event->hw.config & er->config_mask))
    --
    2.33.0


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