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    Subject[PATCH 5.15 044/279] arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY
    Date
    From: Frieder Schrempf <frieder.schrempf@kontron.de>

    [ Upstream commit 315e7b884190a6c9c28e95ad3b724dde9e922b99 ]

    According to the datasheet the VSC8531 PHY expects a reset pulse of 100 ns
    and a delay of 15 ms after the reset has been deasserted. Set the matching
    values in the devicetree.

    Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Signed-off-by: Shawn Guo <shawnguo@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
    index e99e7644ff392..49d7470812eef 100644
    --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
    +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
    @@ -123,8 +123,8 @@

    ethphy: ethernet-phy@0 {
    reg = <0>;
    - reset-assert-us = <100>;
    - reset-deassert-us = <100>;
    + reset-assert-us = <1>;
    + reset-deassert-us = <15000>;
    reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
    };
    };
    --
    2.33.0


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