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SubjectRe: [RFC PATCH] net: phy/mdio: enable mmd indirect access through phy_mii_ioctl()
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On 11/2/21 1:13 PM, Andrew Lunn wrote:
> On Tue, Nov 02, 2021 at 12:39:52PM +0000, Russell King (Oracle) wrote:
>> On Tue, Nov 02, 2021 at 01:49:42AM +0100, Andrew Lunn wrote:
>> > > The use of the indirect registers is specific to PHYs, and we already
>> > > know that various PHYs don't support indirect access, and some emulate
>> > > access to the EEE registers - both of which are handled at the PHY
>> > > driver level.
>> >
>> > That is actually an interesting point. Should the ioctl call actually
>> > use the PHY driver read_mmd and write_mmd? Or should it go direct to
>> > the bus? realtek uses MII_MMD_DATA for something to do with suspend,
>> > and hence it uses genphy_write_mmd_unsupported(), or it has its own
>> > function emulating MMD operations.
>> >
>> > So maybe the ioctl handler actually needs to use __phy_read_mmd() if
>> > there is a phy at the address, rather than go direct to the bus?
>> >
>> > Or maybe we should just say no, you should do this all from userspace,
>> > by implementing C45 over C22 in userspace, the ioctl allows that, the
>> > kernel does not need to be involved.
>>
>> Yes and no. There's a problem accessing anything that involves some kind
>> of indirect or paged access with the current API - you can only do one
>> access under the bus lock at a time, which makes the whole thing
>> unreliable. We've accepted that unreliability on the grounds that this
>> interface is for debugging only, so if it does go wrong, you get to keep
>> all the pieces!
>
> Agreed.
>
>> That said, the MII ioctls are designed to be a bus level thing - you can
>> address anything on the MII bus with them. Pushing the ioctl up to the
>> PHY layer means we need to find the right phy device to operate on. What
>> if we attempt a C45 access at an address that there isn't a phy device?
>
> Yes, i think we need to keep with, this API is for MDIO bus access. If
> you want to do C45 over C22, you need to do it in user space, since
> that builds on top of basic MDIO bus accesses.
>
>> Personally, my feeling would be that if we want to solve this, we need
>> to solve this properly - we need to revise the interface so it's
>> possible to request the kernel to perform a group of MII operations, so
>> that userspace can safely access any paged/indirect register. With that
>> solved, there will be no issue with requiring userspace to know what
>> it's doing with indirect C45 accesses.
>
> I'm against that. It opens up an API to allow user space drivers,
> which i have always pushed back against. The current API is good
> enough you can use it for debug, but at the same time it is
> sufficiently broken that anybody trying to do user space drivers over
> it is asking for trouble. That seems like a good balance to me.

I have not found this to be the case. As soon as you need to access
something using phylink, the emulated registers make the ioctls useless
(especially because there may be multiple phy-like devices for one
interface).

Currently, I use [1] to debug phys without having to worry about what
phylink is trying to simulate. I would much prefer something like what
regmap does: reads are allowed through debugfs, but writes require
editing the kernel source. This allows useful debugging, while making
zero-edit userspace drivers impossible.

And fundamentally, you can always load a module which lets you do your
driver development from userspace anyway (as [1] demonstrates, though I
personally compile it in). I don't really understand why we have to have
worse debug tools to prevent something which is trivial to implement
anyway.

--Sean

[1] https://github.com/wkz/mdio-tools

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