Messages in this thread | | | From | Anup Patel <> | Date | Sat, 20 Nov 2021 09:34:43 +0530 | Subject | Re: [PATCH 10/12] RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESET |
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On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote: > > From: Palmer Dabbelt <palmer@rivosinc.com> > > As of ab7fbad0c7d7 ("riscv: Fix unmet direct dependencies built based on > SOC_VIRT") we select CONFIG_POWER_RESET=y along with CONFIG_SOC_VIRT, > which is already in defconfig. This make setting CONFIG_POWER_RESET in > the defconfigs redundant, so remove it to remain consistent with > savedefconfig. > > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Looks good to me.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards, Anup
> --- > arch/riscv/configs/defconfig | 1 - > arch/riscv/configs/rv32_defconfig | 1 - > 2 files changed, 2 deletions(-) > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index ec9540392df7..a72dbd74b93d 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -74,7 +74,6 @@ CONFIG_SPI_SIFIVE=y > # CONFIG_PTP_1588_CLOCK is not set > CONFIG_GPIOLIB=y > CONFIG_GPIO_SIFIVE=y > -CONFIG_POWER_RESET=y > CONFIG_DRM=m > CONFIG_DRM_RADEON=m > CONFIG_DRM_NOUVEAU=m > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 1f6808aa1261..8b56a7f1eb06 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -70,7 +70,6 @@ CONFIG_HW_RANDOM_VIRTIO=y > CONFIG_SPI=y > CONFIG_SPI_SIFIVE=y > # CONFIG_PTP_1588_CLOCK is not set > -CONFIG_POWER_RESET=y > CONFIG_DRM=y > CONFIG_DRM_RADEON=y > CONFIG_DRM_VIRTIO_GPU=y > -- > 2.32.0 >
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