Messages in this thread | | | From | Andy Shevchenko <> | Date | Thu, 18 Nov 2021 11:52:06 +0200 | Subject | Re: [PATCH v2 0/2] serial: 8250_pci patches to address issues with pericom_do_set_divisor() |
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On Thu, Nov 18, 2021 at 8:09 AM Jay Dolan <jay.dolan@accesio.com> wrote: > On 11/17/21 6:55 AM, Andy Shevchenko wrote: > > A series patches to address three issues one customer managed to hit > > all at once. > > > > 1) Fourth port not being setup correctly on some Pericom chips. Fix > > the entries in pci_serial_quirks array. > > > > 2) Rewrite pericom_do_set_divisor() to always calc divisor and to use > > the uartclk instead of a hard coded value. Always calculate divisor > > without passing control to serial8250_do_set_divisor(). > > > > Jay, can you retest this, please? > I was able to verify that the fourth port was placed at the fixed > address for the card that previously had it at the wrong offset. > I was also able to verify all of the standard baud rates for 24 and > 14.7456 MHz crystals from 50 to their respective uartclk speed on the > oscilloscope.
Thanks!
-- With Best Regards, Andy Shevchenko
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