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SubjectRe: [PATCH v3 4/4] arm64: dts: mediatek: mt8192: fix i2c node names
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On 10/11/2021 20:49, Fabien Parent wrote:
> Fix the i2c node names to be compliant to the YAML schema. The
> I2C node name should match the following pattern: "^i2c@[0-9a-f]+$".
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>

Applied to v5.16-next/dts64

Thanks

> ---
>
> v3: rebased
> v2: new patch
>
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index c7c7d4e017ae..53d790c335f9 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -479,7 +479,7 @@ audsys: clock-controller@11210000 {
> #clock-cells = <1>;
> };
>
> - i2c3: i2c3@11cb0000 {
> + i2c3: i2c@11cb0000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11cb0000 0 0x1000>,
> <0 0x10217300 0 0x80>;
> @@ -498,7 +498,7 @@ imp_iic_wrap_e: clock-controller@11cb1000 {
> #clock-cells = <1>;
> };
>
> - i2c7: i2c7@11d00000 {
> + i2c7: i2c@11d00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d00000 0 0x1000>,
> <0 0x10217600 0 0x180>;
> @@ -511,7 +511,7 @@ i2c7: i2c7@11d00000 {
> status = "disabled";
> };
>
> - i2c8: i2c8@11d01000 {
> + i2c8: i2c@11d01000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d01000 0 0x1000>,
> <0 0x10217780 0 0x180>;
> @@ -524,7 +524,7 @@ i2c8: i2c8@11d01000 {
> status = "disabled";
> };
>
> - i2c9: i2c9@11d02000 {
> + i2c9: i2c@11d02000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d02000 0 0x1000>,
> <0 0x10217900 0 0x180>;
> @@ -543,7 +543,7 @@ imp_iic_wrap_s: clock-controller@11d03000 {
> #clock-cells = <1>;
> };
>
> - i2c1: i2c1@11d20000 {
> + i2c1: i2c@11d20000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d20000 0 0x1000>,
> <0 0x10217100 0 0x80>;
> @@ -556,7 +556,7 @@ i2c1: i2c1@11d20000 {
> status = "disabled";
> };
>
> - i2c2: i2c2@11d21000 {
> + i2c2: i2c@11d21000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d21000 0 0x1000>,
> <0 0x10217180 0 0x180>;
> @@ -569,7 +569,7 @@ i2c2: i2c2@11d21000 {
> status = "disabled";
> };
>
> - i2c4: i2c4@11d22000 {
> + i2c4: i2c@11d22000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d22000 0 0x1000>,
> <0 0x10217380 0 0x180>;
> @@ -588,7 +588,7 @@ imp_iic_wrap_ws: clock-controller@11d23000 {
> #clock-cells = <1>;
> };
>
> - i2c5: i2c5@11e00000 {
> + i2c5: i2c@11e00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11e00000 0 0x1000>,
> <0 0x10217500 0 0x80>;
> @@ -607,7 +607,7 @@ imp_iic_wrap_w: clock-controller@11e01000 {
> #clock-cells = <1>;
> };
>
> - i2c0: i2c0@11f00000 {
> + i2c0: i2c@11f00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11f00000 0 0x1000>,
> <0 0x10217080 0 0x80>;
> @@ -620,7 +620,7 @@ i2c0: i2c0@11f00000 {
> status = "disabled";
> };
>
> - i2c6: i2c6@11f01000 {
> + i2c6: i2c@11f01000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11f01000 0 0x1000>,
> <0 0x10217580 0 0x80>;
>

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