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    Subject[PATCH 5.15 684/917] RDMA/hns: Fix initial arm_st of CQ
    Date
    From: Haoyue Xu <xuhaoyue1@hisilicon.com>

    [ Upstream commit 571fb4fb78a3bf0fcadbe65eca9ca4ccee885af4 ]

    We set the init CQ status to ARMED before. As a result, an unexpected CEQE
    would be reported. Therefore, the init CQ status should be set to no_armed
    rather than REG_NXT_CEQE.

    Fixes: a5073d6054f7 ("RDMA/hns: Add eq support of hip08")
    Link: https://lore.kernel.org/r/20211029095846.26732-1-liangwenpeng@huawei.com
    Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
    Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
    Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
    index d5f3faa1627a4..8e5f0862896ee 100644
    --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
    +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
    @@ -3328,7 +3328,7 @@ static void hns_roce_v2_write_cqc(struct hns_roce_dev *hr_dev,
    memset(cq_context, 0, sizeof(*cq_context));

    hr_reg_write(cq_context, CQC_CQ_ST, V2_CQ_STATE_VALID);
    - hr_reg_write(cq_context, CQC_ARM_ST, REG_NXT_CEQE);
    + hr_reg_write(cq_context, CQC_ARM_ST, NO_ARMED);
    hr_reg_write(cq_context, CQC_SHIFT, ilog2(hr_cq->cq_depth));
    hr_reg_write(cq_context, CQC_CEQN, hr_cq->vector);
    hr_reg_write(cq_context, CQC_CQN, hr_cq->cqn);
    --
    2.33.0


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