Messages in this thread | | | From | Florian Fainelli <> | Subject | Re: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt | Date | Mon, 15 Nov 2021 09:31:07 -0800 |
| |
On Wed, 27 Oct 2021 12:37:29 -0700, Florian Fainelli <f.fainelli@gmail.com> wrote: > The I2C interrupt controller line is off by 32 because the datasheet > describes interrupt inputs into the GIC which are for Shared Peripheral > Interrupts and are starting at offset 32. The ARM GIC binding expects > the SPI interrupts to be numbered from 0 relative to the SPI base. > > Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") > Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> > ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks! -- Florian
| |