Messages in this thread | | | Date | Sat, 13 Nov 2021 18:43:56 +0800 | From | kernel test robot <> | Subject | [chenxing:rperier-timer 14/15] drivers/clocksource/timer-msc313e.c:38:28: error: field 'delay' has incomplete type |
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tree: git://github.com/linux-chenxing/linux.git rperier-timer head: b1770620df3a9763e6da64aadadf52c779ffbf46 commit: f3ee681379df14bb1810edf7f0609a1d63f03d4a [14/15] clocksource: Add support for timekeeping on MStar MSC313e (WIP) config: nios2-allyesconfig (attached as .config) compiler: nios2-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/linux-chenxing/linux/commit/f3ee681379df14bb1810edf7f0609a1d63f03d4a git remote add chenxing git://github.com/linux-chenxing/linux.git git fetch --no-tags chenxing rperier-timer git checkout f3ee681379df14bb1810edf7f0609a1d63f03d4a # save the attached .config to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=nios2 SHELL=/bin/bash drivers/
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/clocksource/timer-msc313e.c:38:28: error: field 'delay' has incomplete type 38 | struct delay_timer delay; | ^~~~~ drivers/clocksource/timer-msc313e.c: In function 'msc313e_delay_init': >> drivers/clocksource/timer-msc313e.c:222:9: error: implicit declaration of function 'register_current_timer_delay' [-Werror=implicit-function-declaration] 222 | register_current_timer_delay(&msc313e_delay->delay); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors
vim +/delay +38 drivers/clocksource/timer-msc313e.c
35 36 struct msc313e_delay { 37 void __iomem * base; > 38 struct delay_timer delay; 39 }; 40 41 static struct timer_of *msc313e_clkevt; 42 static void __iomem *msc313e_clksrc; 43 static struct msc313e_delay *msc313e_delay; 44 45 static void msc313e_timer_stop(void __iomem *base) 46 { 47 writew(0, base + MSC313E_REG_CTRL); 48 } 49 50 static void msc313e_timer_start(void __iomem *base, bool periodic) 51 { 52 u16 reg; 53 54 reg = readw(base + MSC313E_REG_CTRL); 55 if (periodic) 56 reg |= MSC313E_REG_CTRL_TIMER_EN; 57 else 58 reg |= MSC313E_REG_CTRL_TIMER_TRIG; 59 writew(reg | MSC313E_REG_CTRL_TIMER_INT_EN, base + MSC313E_REG_CTRL); 60 } 61 62 static void msc313e_timer_setup(void __iomem *base, unsigned long delay) 63 { 64 writew(delay >> 16, base + MSC313E_REG_TIMER_MAX_HIGH); 65 writew(delay & 0xffff, base + MSC313E_REG_TIMER_MAX_LOW); 66 } 67 68 static unsigned long msc313e_timer_current_value(void __iomem *base) 69 { 70 unsigned long result; 71 72 result = readw(base + MSC313E_REG_COUNTER_LOW); 73 result |= readw(base + MSC313E_REG_COUNTER_HIGH) << 16; 74 75 return result; 76 } 77 78 static int msc313e_timer_clkevt_shutdown(struct clock_event_device *evt) 79 { 80 struct timer_of *timer = to_timer_of(evt); 81 82 msc313e_timer_stop(timer_of_base(timer)); 83 84 return 0; 85 } 86 87 static int msc313e_timer_clkevt_set_oneshot(struct clock_event_device *evt) 88 { 89 struct timer_of *timer = to_timer_of(evt); 90 91 msc313e_timer_stop(timer_of_base(timer)); 92 msc313e_timer_start(timer_of_base(timer), false); 93 94 return 0; 95 } 96 97 static int msc313e_timer_clkevt_set_periodic(struct clock_event_device *evt) 98 { 99 struct timer_of *timer = to_timer_of(evt); 100 101 msc313e_timer_stop(timer_of_base(timer)); 102 msc313e_timer_setup(timer_of_base(timer), timer_of_period(timer)); 103 msc313e_timer_start(timer_of_base(timer), true); 104 105 return 0; 106 } 107 108 static int msc313e_timer_clkevt_next_event(unsigned long evt, struct clock_event_device *clkevt) 109 { 110 struct timer_of *timer = to_timer_of(clkevt); 111 112 msc313e_timer_stop(timer_of_base(timer)); 113 msc313e_timer_setup(timer_of_base(timer), evt); 114 msc313e_timer_start(timer_of_base(timer), false); 115 116 return 0; 117 } 118 119 static irqreturn_t msc313e_timer_clkevt_irq(int irq, void *dev_id) 120 { 121 struct clock_event_device *evt = dev_id; 122 123 evt->event_handler(evt); 124 125 return IRQ_HANDLED; 126 } 127 128 static u64 msc313e_timer_clksrc_read(struct clocksource *cs) 129 { 130 return msc313e_timer_current_value(msc313e_clksrc) & cs->mask; 131 } 132 133 static unsigned long msc313e_read_delay_timer_read(void) 134 { 135 return msc313e_timer_current_value(msc313e_delay->base); 136 } 137 138 static u64 msc313e_timer_sched_clock_read(void) 139 { 140 return msc313e_timer_current_value(msc313e_clksrc); 141 } 142 143 static int __init msc313e_clkevt_init(struct device_node *np) 144 { 145 int ret; 146 147 msc313e_clkevt = kzalloc(sizeof(struct timer_of), GFP_KERNEL); 148 if (!msc313e_clkevt) 149 return -ENOMEM; 150 151 msc313e_clkevt->flags = TIMER_OF_IRQ | TIMER_OF_CLOCK | TIMER_OF_BASE; 152 msc313e_clkevt->clkevt.name = TIMER_NAME; 153 msc313e_clkevt->clkevt.rating = 300; 154 msc313e_clkevt->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 155 msc313e_clkevt->clkevt.set_state_shutdown = msc313e_timer_clkevt_shutdown; 156 msc313e_clkevt->clkevt.set_state_periodic = msc313e_timer_clkevt_set_periodic; 157 msc313e_clkevt->clkevt.set_state_oneshot = msc313e_timer_clkevt_set_oneshot; 158 msc313e_clkevt->clkevt.tick_resume = msc313e_timer_clkevt_shutdown; 159 msc313e_clkevt->clkevt.set_next_event = msc313e_timer_clkevt_next_event; 160 msc313e_clkevt->clkevt.cpumask = cpumask_of(0); 161 msc313e_clkevt->of_irq.handler = msc313e_timer_clkevt_irq; 162 163 ret = timer_of_init(np, msc313e_clkevt); 164 if (ret) 165 goto err_clkevt_kfree; 166 167 msc313e_clkevt->clkevt.irq = msc313e_clkevt->of_irq.irq; 168 169 clockevents_config_and_register(&msc313e_clkevt->clkevt, timer_of_rate(msc313e_clkevt), 170 TIMER_SYNC_TICKS, 0xffffffff); 171 return 0; 172 173 err_clkevt_kfree: 174 kfree(msc313e_clkevt); 175 return ret; 176 } 177 178 static int __init msc313e_clksrc_init(struct device_node *np) 179 { 180 struct timer_of to = { 0 }; 181 int ret; 182 u16 reg; 183 184 to.flags = TIMER_OF_BASE | TIMER_OF_CLOCK; 185 ret = timer_of_init(np, &to); 186 if (ret) 187 return ret; 188 189 msc313e_clksrc = timer_of_base(&to); 190 reg = readw(msc313e_clksrc + MSC313E_REG_CTRL); 191 reg |= MSC313E_REG_CTRL_TIMER_EN; 192 writew(reg, msc313e_clksrc + MSC313E_REG_CTRL); 193 194 sched_clock_register(msc313e_timer_sched_clock_read, 32, timer_of_rate(&to)); 195 return clocksource_mmio_init(timer_of_base(&to), TIMER_NAME, timer_of_rate(&to), 300, 32, 196 msc313e_timer_clksrc_read); 197 } 198 199 static int __init msc313e_delay_init(struct device_node *np) 200 { 201 struct timer_of to = { 0 }; 202 int ret; 203 u16 reg; 204 205 to.flags = TIMER_OF_BASE | TIMER_OF_CLOCK; 206 ret = timer_of_init(np, &to); 207 if (ret) 208 return ret; 209 210 msc313e_delay = kzalloc(sizeof(struct msc313e_delay), GFP_KERNEL); 211 if (!msc313e_delay) 212 return -ENOMEM; 213 214 msc313e_delay->base = timer_of_base(&to); 215 msc313e_delay->delay.read_current_timer = msc313e_read_delay_timer_read; 216 msc313e_delay->delay.freq = timer_of_rate(&to); 217 218 reg = readw(msc313e_delay->base + MSC313E_REG_CTRL); 219 reg |= MSC313E_REG_CTRL_TIMER_EN; 220 writew(reg, msc313e_delay->base + MSC313E_REG_CTRL); 221 > 222 register_current_timer_delay(&msc313e_delay->delay); 223 224 return 0; 225 } 226
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