Messages in this thread | | | Date | Sat, 13 Nov 2021 20:58:28 +0800 | From | kernel test robot <> | Subject | [morse:mpam/snapshot/v5.15 9/139] arch/x86/kernel/cpu/resctrl/core.c:400:6: error: no previous prototype for 'setup_default_ctrlval' |
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git mpam/snapshot/v5.15 head: ce3629841262f725a5f3a327403fcaf0e604a85e commit: c40ac46dd98eac3ed1ab60d72d54344a4ead0e92 [9/139] x86/resctrl: Remove architecture copy of mbps_val config: x86_64-allyesconfig (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/commit/?id=c40ac46dd98eac3ed1ab60d72d54344a4ead0e92 git remote add morse https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git git fetch --no-tags morse mpam/snapshot/v5.15 git checkout c40ac46dd98eac3ed1ab60d72d54344a4ead0e92 # save the attached .config to linux build tree make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/x86/kernel/cpu/resctrl/core.c: In function 'cache_alloc_hsw_probe': arch/x86/kernel/cpu/resctrl/core.c:133:9: error: variable 'h' set but not used [-Werror=unused-but-set-variable] 133 | u32 l, h, max_cbm = BIT_MASK(20) - 1; | ^ arch/x86/kernel/cpu/resctrl/core.c: At top level: >> arch/x86/kernel/cpu/resctrl/core.c:400:6: error: no previous prototype for 'setup_default_ctrlval' [-Werror=missing-prototypes] 400 | void setup_default_ctrlval(struct rdt_resource *r, u32 *dc) | ^~~~~~~~~~~~~~~~~~~~~ arch/x86/kernel/cpu/resctrl/core.c:414:6: error: no previous prototype for 'domain_free' [-Werror=missing-prototypes] 414 | void domain_free(struct rdt_hw_domain *hw_dom) | ^~~~~~~~~~~ cc1: all warnings being treated as errors
vim +/setup_default_ctrlval +400 arch/x86/kernel/cpu/resctrl/core.c
399 > 400 void setup_default_ctrlval(struct rdt_resource *r, u32 *dc) 401 { 402 struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); 403 int i; 404 405 /* 406 * Initialize the Control MSRs to having no control. 407 * For Cache Allocation: Set all bits in cbm 408 * For Memory Allocation: Set b/w requested to 100% 409 */ 410 for (i = 0; i < hw_res->num_closid; i++, dc++) 411 *dc = r->default_ctrl; 412 } 413
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