Messages in this thread | | | Date | Thu, 11 Nov 2021 13:36:32 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH v2 02/13] x86/cpufeatures: add AMD Fam19h Branch Sampling feature |
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On Thu, Nov 11, 2021 at 12:44:04AM -0800, Stephane Eranian wrote: > This patch adds a cpu feature for AMD Fam19h Branch Sampling feature as bit
For all your commit messages:
s/This patch adds/Add/
"This patch" in a commit message is a tautology.
> 31 of EBX on CPUID leaf function 0x80000008. > > Signed-off-by: Stephane Eranian <eranian@google.com> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index d5b5f2ab87a0..e71443f93f04 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -315,6 +315,7 @@ > #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ > #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ > #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ > +#define X86_FEATURE_AMD_BRS (13*32+31) /* Branch Sampling available */
X86_FEATURE_BRS
is perfectly fine - there's no need to say "amd_brs" in /proc/cpuinfo on AMD machines as this is where this flag will be only set.
Thx.
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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