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    Subject[PATCH v2 07/13] perf/x86/amd: make Zen3 branch sampling opt-in
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    This patch adds a kernel config option to make support
    for AMD Zen3 Branch Sampling (BRS) an opt-in compile
    time option.

    Signed-off-by: Stephane Eranian <eranian@google.com>
    ---
    arch/x86/events/Kconfig | 8 +++++++
    arch/x86/events/amd/Makefile | 3 ++-
    arch/x86/events/perf_event.h | 44 ++++++++++++++++++++++++++++--------
    3 files changed, 44 insertions(+), 11 deletions(-)

    diff --git a/arch/x86/events/Kconfig b/arch/x86/events/Kconfig
    index d6cdfe631674..1dc002ef66da 100644
    --- a/arch/x86/events/Kconfig
    +++ b/arch/x86/events/Kconfig
    @@ -44,4 +44,12 @@ config PERF_EVENTS_AMD_UNCORE

    To compile this driver as a module, choose M here: the
    module will be called 'amd-uncore'.
    +
    +config PERF_EVENTS_AMD_BRS
    + depends on PERF_EVENTS && CPU_SUP_AMD
    + tristate "AMD Zen3 Branch Sampling support"
    + help
    + Enable AMD Zen3 branch sampling support (BRS) which samples up to
    + 16 consecutive taken branches in registers.
    +
    endmenu
    diff --git a/arch/x86/events/amd/Makefile b/arch/x86/events/amd/Makefile
    index cf323ffab5cd..b9f5d4610256 100644
    --- a/arch/x86/events/amd/Makefile
    +++ b/arch/x86/events/amd/Makefile
    @@ -1,5 +1,6 @@
    # SPDX-License-Identifier: GPL-2.0
    -obj-$(CONFIG_CPU_SUP_AMD) += core.o brs.o
    +obj-$(CONFIG_CPU_SUP_AMD) += core.o
    +obj-$(CONFIG_PERF_EVENTS_AMD_BRS) += brs.o
    obj-$(CONFIG_PERF_EVENTS_AMD_POWER) += power.o
    obj-$(CONFIG_X86_LOCAL_APIC) += ibs.o
    obj-$(CONFIG_PERF_EVENTS_AMD_UNCORE) += amd-uncore.o
    diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
    index f0026266a9d7..f8dc8faed584 100644
    --- a/arch/x86/events/perf_event.h
    +++ b/arch/x86/events/perf_event.h
    @@ -1213,6 +1213,8 @@ static inline bool fixed_counter_disabled(int i, struct pmu *pmu)
    #ifdef CONFIG_CPU_SUP_AMD

    int amd_pmu_init(void);
    +
    +#ifdef CONFIG_PERF_EVENTS_AMD_BRS
    int amd_brs_init(void);
    void amd_brs_disable(void);
    void amd_brs_enable(void);
    @@ -1245,24 +1247,46 @@ static inline void amd_pmu_brs_del(struct perf_event *event)

    void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in);

    -/*
    - * check if BRS is activated on the CPU
    - * active defined as it has non-zero users and DBG_EXT_CFG.BRSEN=1
    - */
    -static inline bool amd_brs_active(void)
    +static inline s64 amd_brs_adjust_period(s64 period)
    {
    - struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
    + if (period > x86_pmu.lbr_nr)
    + return period - x86_pmu.lbr_nr;

    - return cpuc->brs_active;
    + return period;
    +}
    +#else
    +static inline int amd_brs_init(void)
    +{
    + return 0;
    +}
    +static inline void amd_brs_disable(void) {}
    +static inline void amd_brs_enable(void) {}
    +static inline void amd_brs_drain(void) {}
    +static inline void amd_brs_lopwr_init(void) {}
    +static inline void amd_brs_disable_all(void) {}
    +static inline int amd_brs_setup_filter(struct perf_event *event)
    +{
    + return 0;
    }
    +static inline void amd_brs_reset(void) {}

    -static inline s64 amd_brs_adjust_period(s64 period)
    +static inline void amd_pmu_brs_add(struct perf_event *event)
    {
    - if (period > x86_pmu.lbr_nr)
    - return period - x86_pmu.lbr_nr;
    +}

    +static inline void amd_pmu_brs_del(struct perf_event *event)
    +{
    +}
    +
    +static inline void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in)
    +{
    +}
    +
    +static inline s64 amd_brs_adjust_period(s64 period)
    +{
    return period;
    }
    +#endif

    #else /* CONFIG_CPU_SUP_AMD */

    --
    2.34.0.rc0.344.g81b53c2807-goog
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