lkml.org 
[lkml]   [2021]   [Nov]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH] PCI: Marvell: Update PCIe fixup
On Wed, Nov 10, 2021 at 12:42:53AM +0100, Pali Rohár wrote:
> On Tuesday 02 November 2021 16:13:34 Pali Rohár wrote:
> > On Tuesday 02 November 2021 16:02:01 Thomas Bogendoerfer wrote:
> > > On Tue, Nov 02, 2021 at 11:00:34AM +0100, Pali Rohár wrote:
> > > > > > But I do not have this hardware to verify it.
> > > > >
> > > > > I still have a few Cobalt systems here.
> > > >
> > > > Perfect! It would help if you could provide 'lspci -nn -vv' output from
> > > > that system. In case you have very old version of lspci on that system
> > > > you could try to run it with '-xxxx' (or '-xxx') which prints hexdump
> > > > and I can parse it with local lspci.
>
> Thomas, one more question, do you have also GT-64115 system which has
> PCI device id 0x4611? Based on Maciej quote, GT-64115 probably also
> reports itself as "Memory controller" instead of "Host Bridge". So lspci
> output from GT-64115 could be also interesting.

The only systems with GT64-xxx chips I have are Cobalt systems, but none of
them has a GT-64115 chip (Raq1 comes with GT-64011 and Raq2 with GT-64111).

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]

\
 
 \ /
  Last update: 2021-11-10 09:57    [W:0.280 / U:0.260 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site