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    Subject[PATCH 5.14 044/125] drm/i915: Convert unconditional clflush to drm_clflush_virt_range()
    Date
    From: Ville Syrjälä <ville.syrjala@linux.intel.com>

    commit fcf918ffd3b35e288097036c04af7446b2c6f2f1 upstream.

    This one is apparently a "clflush for good measure", so bit more
    justification (if you can call it that) than some of the others.
    Convert to drm_clflush_virt_range() again so that machines without
    clflush will survive the ordeal.

    Cc: stable@vger.kernel.org
    Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Cc: Thomas Hellström <thomas.hellstrom@intel.com> #v1
    Fixes: 12ca695d2c1e ("drm/i915: Do not share hwsp across contexts any more, v8.")
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20211014090941.12159-3-ville.syrjala@linux.intel.com
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit af7b6d234eefa30c461cc16912bafb32b9e6141c)
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
    +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
    @@ -225,7 +225,7 @@ void intel_timeline_reset_seqno(const st

    memset(hwsp_seqno + 1, 0, TIMELINE_SEQNO_BYTES - sizeof(*hwsp_seqno));
    WRITE_ONCE(*hwsp_seqno, tl->seqno);
    - clflush(hwsp_seqno);
    + drm_clflush_virt_range(hwsp_seqno, TIMELINE_SEQNO_BYTES);
    }

    void intel_timeline_enter(struct intel_timeline *tl)

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