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    Subject[PATCH 4.19 22/35] RDMA/mlx5: Set user priority for DCT
    Date
    From: Patrisious Haddad <phaddad@nvidia.com>

    commit 1ab52ac1e9bc9391f592c9fa8340a6e3e9c36286 upstream.

    Currently, the driver doesn't set the PCP-based priority for DCT, hence
    DCT response packets are transmitted without user priority.

    Fix it by setting user provided priority in the eth_prio field in the DCT
    context, which in turn sets the value in the transmitted packet.

    Fixes: 776a3906b692 ("IB/mlx5: Add support for DC target QP")
    Link: https://lore.kernel.org/r/5fd2d94a13f5742d8803c218927322257d53205c.1633512672.git.leonro@nvidia.com
    Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
    Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
    Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
    Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/infiniband/hw/mlx5/qp.c | 2 ++
    1 file changed, 2 insertions(+)

    --- a/drivers/infiniband/hw/mlx5/qp.c
    +++ b/drivers/infiniband/hw/mlx5/qp.c
    @@ -3387,6 +3387,8 @@ static int mlx5_ib_modify_dct(struct ib_
    MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
    MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
    MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
    + if (attr->ah_attr.type == RDMA_AH_ATTR_TYPE_ROCE)
    + MLX5_SET(dctc, dctc, eth_prio, attr->ah_attr.sl & 0x7);

    err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
    MLX5_ST_SZ_BYTES(create_dct_in));

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