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    Subject[PATCH 5.10 14/77] pinctrl: amd: disable and mask interrupts on probe
    Date
    From: Sachi King <nakato@nakato.io>

    commit 4e5a04be88fe335ad5331f4f8c17f4ebd357e065 upstream.

    Some systems such as the Microsoft Surface Laptop 4 leave interrupts
    enabled and configured for use in sleep states on boot, which cause
    unexpected behaviour such as spurious wakes and failed resumes in
    s2idle states.

    As interrupts should not be enabled until they are claimed and
    explicitly enabled, disabling any interrupts mistakenly left enabled by
    firmware should be safe.

    Signed-off-by: Sachi King <nakato@nakato.io>
    Link: https://lore.kernel.org/r/20211009033240.21543-1-nakato@nakato.io
    Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/pinctrl/pinctrl-amd.c | 31 +++++++++++++++++++++++++++++++
    1 file changed, 31 insertions(+)

    --- a/drivers/pinctrl/pinctrl-amd.c
    +++ b/drivers/pinctrl/pinctrl-amd.c
    @@ -764,6 +764,34 @@ static const struct pinconf_ops amd_pinc
    .pin_config_group_set = amd_pinconf_group_set,
    };

    +static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
    +{
    + struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
    + unsigned long flags;
    + u32 pin_reg, mask;
    + int i;
    +
    + mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
    + BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |
    + BIT(WAKE_CNTRL_OFF_S4);
    +
    + for (i = 0; i < desc->npins; i++) {
    + int pin = desc->pins[i].number;
    + const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);
    +
    + if (!pd)
    + continue;
    +
    + raw_spin_lock_irqsave(&gpio_dev->lock, flags);
    +
    + pin_reg = readl(gpio_dev->base + i * 4);
    + pin_reg &= ~mask;
    + writel(pin_reg, gpio_dev->base + i * 4);
    +
    + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
    + }
    +}
    +
    #ifdef CONFIG_PM_SLEEP
    static bool amd_gpio_should_save(struct amd_gpio *gpio_dev, unsigned int pin)
    {
    @@ -901,6 +929,9 @@ static int amd_gpio_probe(struct platfor
    return PTR_ERR(gpio_dev->pctrl);
    }

    + /* Disable and mask interrupts */
    + amd_gpio_irq_init(gpio_dev);
    +
    girq = &gpio_dev->gc.irq;
    girq->chip = &amd_gpio_irqchip;
    /* This will let us handle the parent IRQ in the driver */

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