Messages in this thread | | | Subject | Re: [PATCH 3/7] soc: apple: Add driver for Apple PMGR power state controls | From | Hector Martin <> | Date | Thu, 7 Oct 2021 01:11:04 +0900 |
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On 06/10/2021 18.24, Philipp Zabel wrote: >> +static int apple_pmgr_reset_reset(struct reset_controller_dev *rcdev, unsigned long id) >> +{ >> + int ret; >> + >> + ret = apple_pmgr_reset_assert(rcdev, id); >> + if (ret) >> + return ret; >> + >> + usleep_range(APPLE_PMGR_RESET_TIME, 2 * APPLE_PMGR_RESET_TIME); > > Is this delay known to be long enough for all consumers using the > reset_control_reset() functionality? Are there any users at all?
I tested this for UART and ANS outside of Linux, and found that even back to back register writes worked, so the 1us thing is already conservative. I have no idea if we'll run into some weirdo block that needs more time, though. If we do then this will have to be bumped or turned into a property.
> Is it ok for a genpd transition to happen during this sleep?
I expect consumers to call reset while the device is active; it won't even work without that, as the reset is synchronous and just doesn't take effect while clock gated (at least for UART). See the dev_err()s that fire when that happens.
-- Hector Martin (marcan@marcan.st) Public Key: https://mrcn.st/pub
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