Messages in this thread | | | Date | Wed, 6 Oct 2021 19:24:50 -0700 | Subject | Re: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support | From | Florian Fainelli <> |
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On 10/6/2021 9:43 AM, Rob Herring wrote: > The first 10 patches add a new function, of_get_cpu_hwid(), which parses > CPU DT node 'reg' property, and then use it to replace all the open > coded versions of parsing CPU node 'reg' properties. > > The last 2 patches add support for populating the cacheinfo 'id' on DT > platforms. The minimum associated CPU hwid is used for the id. The id is > optional, but necessary for resctrl which is being adapted for Arm MPAM. > > Tested on arm64. Compile tested on arm, x86 and powerpc.
On ARM and ARM64:
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
lscpu -C continues to work on ARM64 as before with cache properties provided in the FDT. -- Florian
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