Messages in this thread |  | | Date | Sun, 31 Oct 2021 20:43:18 +0800 | From | kernel test robot <> | Subject | [hnaz-mm:master 343/435] arch/riscv/lib/delay.c:77:17: error: implicit declaration of function 'cpu_relax' |
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tree: https://github.com/hnaz/linux-mm master head: b8280145cf2a894c873fdf91fb2af474c52ac6cc commit: eaadd3a1784064254eb06b36fbd4b653f0228478 [343/435] include/linux/delay.h: replace kernel.h with the necessary inclusions config: riscv-allyesconfig (attached as .config) compiler: riscv64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/hnaz/linux-mm/commit/eaadd3a1784064254eb06b36fbd4b653f0228478 git remote add hnaz-mm https://github.com/hnaz/linux-mm git fetch --no-tags hnaz-mm master git checkout eaadd3a1784064254eb06b36fbd4b653f0228478 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/riscv/lib/delay.c: In function '__delay': >> arch/riscv/lib/delay.c:77:17: error: implicit declaration of function 'cpu_relax' [-Werror=implicit-function-declaration] 77 | cpu_relax(); | ^~~~~~~~~ cc1: all warnings being treated as errors
vim +/cpu_relax +77 arch/riscv/lib/delay.c
6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 71 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 72 void __delay(unsigned long cycles) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 73 { 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 74 u64 t0 = get_cycles(); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 75 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 76 while ((unsigned long)(get_cycles() - t0) < cycles) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 @77 cpu_relax(); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 78 } 24948b7ec0f31d3 Olof Johansson 2017-11-29 79 EXPORT_SYMBOL(__delay); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 80
:::::: The code at line 77 was first introduced by commit :::::: 6d60b6ee0c9777b92c47f6dc8aad1dd90612e4fa RISC-V: Device, timer, IRQs, and the SBI
:::::: TO: Palmer Dabbelt <palmer@dabbelt.com> :::::: CC: Palmer Dabbelt <palmer@dabbelt.com>
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