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Subject[RFC PATCH v2 3/3] clk: lan966x: Extend lan966x clock driver for clock gating support
Date
Extend the clock driver to add support also for clock gating. The
following peripherals can be gated: UHPHS, UDPHS, MCRAMC, HMATRIX.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
drivers/clk/clk-lan966x.c | 78 +++++++++++++++++++++++++++++++++++++--
1 file changed, 74 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index 19bec94e1551..cd372e2c0654 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c
@@ -48,6 +48,20 @@ static struct clk_init_data init = {
.num_parents = ARRAY_SIZE(lan966x_gck_pdata),
};

+struct clk_gate_soc_desc {
+ const char *name;
+ int bit_idx;
+};
+
+static const struct clk_gate_soc_desc clk_gate_desc[] = {
+ { "uhphs", 11 },
+ { "udphs", 10 },
+ { "mcramc", 9 },
+ { "hmatrix", 8 },
+ { }
+};
+
+static DEFINE_SPINLOCK(clk_gate_lock);
static void __iomem *base;

static int lan966x_gck_enable(struct clk_hw *hw)
@@ -188,11 +202,46 @@ static struct clk_hw *lan966x_gck_clk_register(struct device *dev, int i)
return &priv->hw;
};

+static int lan966x_gate_clk_register(struct device *dev,
+ struct clk_hw_onecell_data *hw_data,
+ void __iomem *gate_base)
+{
+ int i;
+
+ for (i = GCK_GATE_UHPHS; i < N_CLOCKS; ++i) {
+ int idx = i - GCK_GATE_UHPHS;
+
+ hw_data->hws[i] =
+ clk_hw_register_gate(dev, clk_gate_desc[idx].name,
+ "lan966x", 0, base,
+ clk_gate_desc[idx].bit_idx,
+ 0, &clk_gate_lock);
+
+ if (IS_ERR(hw_data->hws[i]))
+ return dev_err_probe(dev, PTR_ERR(hw_data->hws[i]),
+ "failed to register %s clock\n",
+ clk_gate_desc[idx].name);
+ }
+
+ return 0;
+}
+
+static void lan966x_gate_clk_unregister(struct clk_hw_onecell_data *hw_data)
+{
+ int i;
+
+ for (i = GCK_GATE_UHPHS; i < N_CLOCKS; ++i)
+ if (!IS_ERR(hw_data->hws[i]))
+ clk_hw_unregister(hw_data->hws[i]);
+}
+
static int lan966x_clk_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *hw_data;
struct device *dev = &pdev->dev;
- int i;
+ void __iomem *gate_base;
+ struct resource *res;
+ int i, ret;

hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, N_CLOCKS),
GFP_KERNEL);
@@ -205,9 +254,9 @@ static int lan966x_clk_probe(struct platform_device *pdev)

init.ops = &lan966x_gck_ops;

- hw_data->num = N_CLOCKS;
+ hw_data->num = GCK_GATE_UHPHS;

- for (i = 0; i < N_CLOCKS; i++) {
+ for (i = 0; i < GCK_GATE_UHPHS; i++) {
init.name = clk_names[i];
hw_data->hws[i] = lan966x_gck_clk_register(dev, i);
if (IS_ERR(hw_data->hws[i])) {
@@ -217,7 +266,28 @@ static int lan966x_clk_probe(struct platform_device *pdev)
}
}

- return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (res) {
+ gate_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(gate_base))
+ return PTR_ERR(gate_base);
+
+ hw_data->num = N_CLOCKS;
+
+ ret = lan966x_gate_clk_register(dev, hw_data, gate_base);
+ if (ret)
+ goto unregister;
+ }
+
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
+ if (ret)
+ goto unregister;
+
+ return 0;
+
+unregister:
+ lan966x_gate_clk_unregister(hw_data);
+ return ret;
}

static const struct of_device_id lan966x_clk_dt_ids[] = {
--
2.33.0
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