Messages in this thread | | | Date | Wed, 27 Oct 2021 22:32:42 +0200 | Subject | Re: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt | From | Christian Lamparter <> |
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On 27/10/2021 21:37, Florian Fainelli wrote: > The I2C interrupt controller line is off by 32 because the datasheet > describes interrupt inputs into the GIC which are for Shared Peripheral > Interrupts and are starting at offset 32. The ARM GIC binding expects > the SPI interrupts to be numbered from 0 relative to the SPI base. > > Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") > Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Thank you! This fixed the MR32 iproc-i2c issue. It's working now (will post the patch for the MR32 tomorrow):
# cat /proc/interrupts CPU0 CPU1 24: 1 0 GIC-0 27 Edge gt 25: 110418 108252 GIC-0 29 Edge twd 26: 476 0 GIC-0 117 Level gpio, ttyS0 31: 128 0 GIC-0 121 Level 18009000.i2c <--- YES! 32: 49477 0 GIC-0 100 Level brcmnand 33: 0 0 GIC-0 109 Level mspi_done 34: 0 0 GIC-0 110 Level mspi_halted 35: 0 0 GIC-0 104 Level spi_lr_fullness_reached 36: 0 0 GIC-0 105 Level spi_lr_session_aborted 37: 0 0 GIC-0 106 Level spi_lr_impatient 38: 0 0 GIC-0 107 Level spi_lr_session_done 40: 7227 0 GIC-0 179 Level eth2 51: 0 0 BCMA-GPIO 21 Edge keys
and the attached AT24 + PoE-Power monitor can be probed + read as before.
[ 12.042576] at24 0-0050: 8192 byte 24c64 EEPROM, read-only ... [ 12.077671] ina2xx 0-0045: power monitor ina219 (Rshunt = 60000 uOhm)
Tested-by: Christian Lamparter <chunkeey@gmail.com>
Regards Christian
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