Messages in this thread | | | Date | Wed, 27 Oct 2021 12:54:09 +0200 (CEST) | From | Richard Weinberger <> | Subject | Re: [PATCH 0/4] enabling Advanced protection and security features |
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----- Ursprüngliche Mail ----- > Von: "shiva linuxworks" <shiva.linuxworks@gmail.com> > An: "Tudor Ambarus" <tudor.ambarus@microchip.com>, "Michael Walle" <michael@walle.cc>, "Pratyush Yadav" > <p.yadav@ti.com>, "Miquel Raynal" <miquel.raynal@bootlin.com>, "richard" <richard@nod.at>, "Vignesh Raghavendra" > <vigneshr@ti.com> > CC: "linux-mtd" <linux-mtd@lists.infradead.org>, "linux-kernel" <linux-kernel@vger.kernel.org>, "Shivamurthy Shastri" > <sshivamurthy@micron.com> > Gesendet: Mittwoch, 27. Oktober 2021 12:33:48 > Betreff: [PATCH 0/4] enabling Advanced protection and security features
> From: Shivamurthy Shastri <sshivamurthy@micron.com> > > Standard protection features in SPI NOR flashes are legacy and offer a > simple way to protect the memory array against accidental or unwanted > modification of its content. > > These patches enable the support for advanced sector protection which > protects memory from accidentally corrupting code and data stored, and > it also prevents malicious attacks that could intentionally modify the > code or data stored in the memory. > > Micron Flashes offer some of the advanced protection methods using > volatile lock bits, non-volatile lock bits, global freeze bits, and > password.
Can you please point us to the technical documentation of these features? I'm especially interested in the password feature.
Thanks, //richard
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