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SubjectRe: [RFC V2 5/5] arm64: dts: imx8mm-evk: Enable OV5640 Camera
Hi Adam,

Thank you for the patch.

On Sat, Oct 23, 2021 at 03:34:56PM -0500, Adam Ford wrote:
> The schematic shows support for a camera interface, and the NXP
> kernel shows it is an OV5640.

The camera is an external module though. Should this be a DT overlay ?

> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 44 +++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index e033d0257b5a..27217d30b8d8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -239,6 +239,10 @@ ldo6_reg: LDO6 {
> };
> };
>
> +&csi {
> + status = "okay";
> +};
> +
> &i2c2 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -287,6 +291,38 @@ pca6416: gpio@20 {
> gpio-controller;
> #gpio-cells = <2>;
> };
> +
> + camera@3c {
> + compatible = "ovti,ov5640";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ov5640>;
> + reg = <0x3c>;
> + clocks = <&clk IMX8MM_CLK_CLKO1>;
> + clock-names = "xclk";
> + assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
> + assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
> + assigned-clock-rates = <24000000>;
> + powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> +
> + port {
> + /* MIPI CSI-2 bus endpoint */
> + ov5640_to_mipi_csi2: endpoint {
> + remote-endpoint = <&imx8mm_mipi_csi_in>;
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +&imx8mm_mipi_csi_in {
> + remote-endpoint = <&ov5640_to_mipi_csi2>;
> + data-lanes = <1 2>;
> +};
> +
> +&mipi_csi2 {
> + status = "okay";
> };
>
> &sai3 {
> @@ -406,6 +442,14 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
> >;
> };
>
> + pinctrl_ov5640: ov5640grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
> + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
> + MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59
> + >;
> + };
> +
> pinctrl_pmic: pmicirqgrp {
> fsl,pins = <
> MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141

--
Regards,

Laurent Pinchart

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