Messages in this thread | | | Date | Wed, 27 Oct 2021 14:22:25 -0700 (PDT) | Subject | Re: [PATCH 13/15] irq: riscv: perform irqentry in entry code | From | Palmer Dabbelt <> |
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On Thu, 21 Oct 2021 11:02:34 PDT (-0700), mark.rutland@arm.com wrote: > In preparation for removing HANDLE_DOMAIN_IRQ_IRQENTRY, have arch/riscv > perform all the irqentry accounting in its entry code. As arch/riscv > uses GENERIC_IRQ_MULTI_HANDLER, we can use generic_handle_arch_irq() to > do so. > > Since generic_handle_arch_irq() handles the irq entry and setting the > irq regs, and happens before the irqchip code calls handle_IPI(), we can > remove the redundant irq entry and irq regs manipulation from > handle_IPI(). > > There should be no functional change as a result of this patch. > > Signed-off-by: Mark Rutland <mark.rutland@arm.com> > Cc: Albert Ou <aou@eecs.berkeley.edu> > Cc: Marc Zyngier <maz@kernel.org> > Cc: Palmer Dabbelt <palmer@dabbelt.com> > Cc: Paul Walmsley <paul.walmsley@sifive.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > --- > arch/riscv/Kconfig | 1 - > arch/riscv/kernel/entry.S | 3 +-- > arch/riscv/kernel/smp.c | 9 +-------- > 3 files changed, 2 insertions(+), 11 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 740653063a56..301a54233c7e 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -63,7 +63,6 @@ config RISCV > select GENERIC_SMP_IDLE_THREAD > select GENERIC_TIME_VSYSCALL if MMU && 64BIT > select HANDLE_DOMAIN_IRQ > - select HANDLE_DOMAIN_IRQ_IRQENTRY > select HAVE_ARCH_AUDITSYSCALL > select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL > select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 98f502654edd..64236f7efde5 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -130,8 +130,7 @@ skip_context_tracking: > > /* Handle interrupts */ > move a0, sp /* pt_regs */ > - la a1, handle_arch_irq > - REG_L a1, (a1) > + la a1, generic_handle_arch_irq > jr a1 > 1: > /* > diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c > index 921d9d7df400..2f6da845c9ae 100644 > --- a/arch/riscv/kernel/smp.c > +++ b/arch/riscv/kernel/smp.c > @@ -140,12 +140,9 @@ void arch_irq_work_raise(void) > > void handle_IPI(struct pt_regs *regs) > { > - struct pt_regs *old_regs = set_irq_regs(regs); > unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits; > unsigned long *stats = ipi_data[smp_processor_id()].stats; > > - irq_enter(); > - > riscv_clear_ipi(); > > while (true) { > @@ -156,7 +153,7 @@ void handle_IPI(struct pt_regs *regs) > > ops = xchg(pending_ipis, 0); > if (ops == 0) > - goto done; > + return; > > if (ops & (1 << IPI_RESCHEDULE)) { > stats[IPI_RESCHEDULE]++; > @@ -189,10 +186,6 @@ void handle_IPI(struct pt_regs *regs) > /* Order data access and bit testing. */ > mb(); > } > - > -done: > - irq_exit(); > - set_irq_regs(old_regs); > } > > static const char * const ipi_names[] = {
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
I'm assuming you want to keep these togther.
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