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SubjectRe: [PATCH v2 1/2] drm/msm/dp: Add support for SC7280 eDP
Hi Stephen,

On 2021-10-21 23:32, Stephen Boyd wrote:
> Quoting Sankeerth Billakanti (2021-10-20 05:14:10)
>> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> index 62e75dc..9fea49c 100644
>> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
>> @@ -1238,9 +1240,21 @@ static int dp_ctrl_link_train(struct
>> dp_ctrl_private *ctrl,
>> link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING;
>>
>> dp_aux_link_configure(ctrl->aux, &link_info);
>> +
>> + if (dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
>
> Please add a static inline macro in include/drm/drm_dp_helper.h that
> makes this more readable. Something similar to drm_dp_is_branch() but
> with a human readable replacement for "is_branch". Maybe drm_dp_ssc()?
>
Okay, I will add a macro, drm_dp_max_downspread (to be consistent with
the spec and other macros in the file) in drm_dp_helper.h file.

>> + ssc = DP_SPREAD_AMP_0_5;
>> + drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc,
>> 1);
>> + }
>> +
>> drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
>> &encoding, 1);
>>
>> + if (dpcd[DP_EDP_CONFIGURATION_CAP] &
>> DP_ALTERNATE_SCRAMBLER_RESET_CAP) {
>
> And this one already has a helper,
> drm_dp_alternate_scrambler_reset_cap().
>
Okay, I will use that.

>> + assr = DP_ALTERNATE_SCRAMBLER_RESET_ENABLE;
>> + drm_dp_dpcd_write(ctrl->aux, DP_EDP_CONFIGURATION_SET,
>> + &assr, 1);
>> + }
>> +
>> ret = dp_ctrl_link_train_1(ctrl, training_step);
>> if (ret) {
>> DRM_ERROR("link training #1 failed. ret=%d\n", ret);
>> @@ -1312,9 +1326,11 @@ static int
>> dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl)
>> struct dp_io *dp_io = &ctrl->parser->io;
>> struct phy *phy = dp_io->phy;
>> struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp;
>> + const u8 *dpcd = ctrl->panel->dpcd;
>>
>> opts_dp->lanes = ctrl->link->link_params.num_lanes;
>> opts_dp->link_rate = ctrl->link->link_params.rate / 100;
>> + opts_dp->ssc = dpcd[DP_MAX_DOWNSPREAD] &
>> DP_MAX_DOWNSPREAD_0_5;
>> dp_ctrl_set_clock_rate(ctrl, DP_CTRL_PM, "ctrl_link",
>> ctrl->link->link_params.rate *
>> 1000);
>>
>> @@ -1406,7 +1422,7 @@ void dp_ctrl_host_deinit(struct dp_ctrl
>> *dp_ctrl)
>>
>> static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl)
>> {
>> - u8 *dpcd = ctrl->panel->dpcd;
>> + const u8 *dpcd = ctrl->panel->dpcd;
>>
>> /*
>> * For better interop experience, used a fixed NVID=0x8000
>> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
>> b/drivers/gpu/drm/msm/dp/dp_display.c
>> index c867745..c16311b 100644
>> --- a/drivers/gpu/drm/msm/dp/dp_display.c
>> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
>> @@ -144,8 +144,16 @@ static const struct msm_dp_config sc8180x_dp_cfg
>> = {
>> .num_descs = 3,
>> };
>>
>> +static const struct msm_dp_config sc7280_dp_cfg = {
>> + .descs = (struct msm_dp_desc[]) {
>
> const
>
Will add it.

>> + { .io_start = 0x0aea0000, .connector_type =
>> DRM_MODE_CONNECTOR_eDP },
>> + },
>> + .num_descs = 1,
>> +};
>> +
>> static const struct of_device_id dp_dt_match[] = {
>> { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg },
>> + { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_cfg },
>> { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_cfg },
>> { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_cfg },
>> {}
>> @@ -1440,7 +1448,7 @@ void msm_dp_irq_postinstall(struct msm_dp
>> *dp_display)
>>
>> dp_hpd_event_setup(dp);
>>
>> - dp_add_event(dp, EV_HPD_INIT_SETUP, 0, 100);
>> + dp_add_event(dp, EV_HPD_INIT_SETUP, 0, 1);
>
> This has no explanation. What is it?
Will add explanation for it as a comment.

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