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Subject[PATCH v2 1/1] clk: samsung: exynos850: Register clocks early
Date
Some clocks must be registered before init calls. For example MCT clock
(from CMU_PERI) is needed for MCT timer driver, which is registered
with TIMER_OF_DECLARE(). By the time we get to core_initcall() used for
clk-exynos850 platform driver init, it's already too late. Inability to
get "mct" clock in MCT driver leads to kernel panic, as functions
registered with *_OF_DECLARE() can't do deferred calls. MCT timer driver
can't be fixed either, as it's acting as a clock source and it's
essential to register it in start_kernel() -> time_init().

Let's register CMU_PERI clocks early, using CLK_OF_DECLARE_DRIVER(), and
do all stuff relying on "struct dev" object (like runtime PM and
enabling bus clock) later in platform driver probe. Basically
CLK_OF_DECLARE_DRIVER() matches CMU compatible, but clears OF_POPULATED
flag, which allows the same device to be matched again later.

Similar issue was discussed at [1] and addressed in commit 1f7db7bbf031
("clk: renesas: cpg-mssr: Add early clock support"), as well as in
drivers/clk/mediatek/clk-mt2712.c.

[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20180829132954.64862-2-chris.brandt@renesas.com/

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- Register only CMU_PERI clocks early

Notes:
- This patch should be applied on top of CMU_APM series
(clk: samsung: exynos850: Implement CMU_APM domain)

drivers/clk/samsung/clk-exynos850.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos850.c b/drivers/clk/samsung/clk-exynos850.c
index 95e373d17b42..ecffa5c7a081 100644
--- a/drivers/clk/samsung/clk-exynos850.c
+++ b/drivers/clk/samsung/clk-exynos850.c
@@ -753,6 +753,15 @@ static const struct samsung_cmu_info peri_cmu_info __initconst = {
.clk_name = "dout_peri_bus",
};

+static void __init exynos850_cmu_peri_init(struct device_node *np)
+{
+ exynos850_init_clocks(np, peri_clk_regs, ARRAY_SIZE(peri_clk_regs));
+ samsung_cmu_register_one(np, &peri_cmu_info);
+}
+
+CLK_OF_DECLARE_DRIVER(exynos850_cmu_peri, "samsung,exynos850-cmu-peri",
+ exynos850_cmu_peri_init);
+
/* ---- CMU_CORE ------------------------------------------------------------ */

/* Register Offset definitions for CMU_CORE (0x12000000) */
@@ -920,8 +929,12 @@ static int __init exynos850_cmu_probe(struct platform_device *pdev)
struct device_node *np = dev->of_node;

info = of_device_get_match_data(dev);
- exynos850_init_clocks(np, info->clk_regs, info->nr_clk_regs);
- samsung_cmu_register_one(np, info);
+
+ /* Early clocks are already registered using CLK_OF_DECLARE_DRIVER() */
+ if (info != &peri_cmu_info) {
+ exynos850_init_clocks(np, info->clk_regs, info->nr_clk_regs);
+ samsung_cmu_register_one(np, info);
+ }

/* Keep bus clock running, so it's possible to access CMU registers */
if (info->clk_name) {
--
2.30.2
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