Messages in this thread | | | Date | Mon, 25 Oct 2021 12:57:45 +0100 | From | Marc Zyngier <> | Subject | Re: [PATCH 2/3] irqchip/gic-v3-its: Postpone LPI pending table freeing and memreserve |
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On Sun, 24 Oct 2021 16:51:53 +0100, Valentin Schneider <valentin.schneider@arm.com> wrote: > > What we could do instead is only have a PREALLOCATED flag (or RESERVED; in > any case just one rather than two) set in its_cpu_init_lpis(), and ensure > each CPU only ever executes the body of the callback exactly once. > > if (already_booted()) > return 0; > > if (PREALLOCATED) > its_free_pending_table(); > else > gic_reserve_range(); > > out: > // callback removal faff here > return 0; > > Unfortunately, the boot CPU will already be present in > cpus_booted_once_mask when this is first invoked for the BP, so AFAICT we'd > need some new tracking utility (either a new RDIST_LOCAL flag or a separate > cpumask). > > WDYT?
It'd certainly look saner. You may even be able to take advantage of the fact that the boot CPU is always 0.
Thanks,
M.
-- Without deviation from the norm, progress is not possible.
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