Messages in this thread | | | Date | Mon, 25 Oct 2021 12:50:00 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH v2 0/5] mm/mprotect: avoid unnecessary TLB flushes |
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On Thu, Oct 21, 2021 at 08:04:50PM -0700, Andrew Morton wrote: > On Thu, 21 Oct 2021 05:21:07 -0700 Nadav Amit <nadav.amit@gmail.com> wrote: > > > This patch-set is intended to remove unnecessary TLB flushes. It is > > based on feedback from v1 and several bugs I found in v1 myself. > > > > Basically, there are 3 optimizations in this patch-set: > > 1. Avoiding TLB flushes on change_huge_pmd() that are only needed to > > prevent the A/D bits from changing. > > 2. Use TLB batching infrastructure to batch flushes across VMAs and > > do better/fewer flushes. > > 3. Avoid TLB flushes on permission demotion. > > > > Andrea asked for the aforementioned (2) to come after (3), but this > > is not simple (specifically since change_prot_numa() needs the number > > of pages affected). > > [1/5] appears to be a significant fix which should probably be > backported into -stable kernels. If you agree with this then I suggest > it be prepared as a standalone patch, separate from the other four > patches. With a cc:stable.
I am confused, 1/5 doesn't actually do *anything*. I also cannot find any further usage of the introduced X86_BUG_PTE_LEAK.
I'm thinking patch #2 means to have something like:
if (cpu_feature_enabled(X86_BUG_PTE_LEAK)) flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
In the newly minted: pmdp_invalidate_ad(), but alas, nothing there.
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