Messages in this thread Patch in this message | | | Date | Wed, 20 Oct 2021 18:47:10 -0000 | From | "irqchip-bot for Claudiu Beznea" <> | Subject | [irqchip: irq/irqchip-next] dt-bindings: microchip,eic: Add bindings for the Microchip EIC |
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The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 36179af21cc812ccac37678b1c8114856876fb3f Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/36179af21cc812ccac37678b1c8114856876fb3f Author: Claudiu Beznea <claudiu.beznea@microchip.com> AuthorDate: Mon, 27 Sep 2021 09:36:56 +03:00 Committer: Marc Zyngier <maz@kernel.org> CommitterDate: Wed, 20 Oct 2021 19:40:34 +01:00
dt-bindings: microchip,eic: Add bindings for the Microchip EIC
Add DT bindings for Microchip External Interrupt Controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210927063657.2157676-2-claudiu.beznea@microchip.com --- Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml new file mode 100644 index 0000000..5000388 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/microchip,eic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip External Interrupt Controller + +maintainers: + - Claudiu Beznea <claudiu.beznea@microchip.com> + +description: + This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides + support for handling up to 2 external interrupt lines. + +properties: + compatible: + enum: + - microchip,sama7g5-eic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell is the input IRQ number (between 0 and 1), the second cell + is the trigger type as defined in interrupt.txt present in this directory. + + interrupts: + description: | + Contains the GIC SPI IRQs mapped to the external interrupt lines. They + should be specified sequentially from output 0 to output 1. + minItems: 2 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + const: pclk + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/at91.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + eic: interrupt-controller@e1628000 { + compatible = "microchip,sama7g5-eic"; + reg = <0xe1628000 0x100>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; + clock-names = "pclk"; + }; + +...
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