Messages in this thread | | | From | Huacai Chen <> | Date | Sat, 2 Oct 2021 19:05:10 +0800 | Subject | Re: [PATCH V4 07/22] LoongArch: Add atomic/locking headers |
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Hi, Peter,
On Fri, Oct 1, 2021 at 7:04 PM Peter Zijlstra <peterz@infradead.org> wrote: > > On Mon, Sep 27, 2021 at 02:42:44PM +0800, Huacai Chen wrote: > > diff --git a/arch/loongarch/include/asm/spinlock.h b/arch/loongarch/include/asm/spinlock.h > > new file mode 100644 > > index 000000000000..2544ee546596 > > --- /dev/null > > +++ b/arch/loongarch/include/asm/spinlock.h > > @@ -0,0 +1,12 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (C) 2020-2021 Loongson Technology Corporation Limited > > + */ > > +#ifndef _ASM_SPINLOCK_H > > +#define _ASM_SPINLOCK_H > > + > > +#include <asm/processor.h> > > +#include <asm/qspinlock.h> > > +#include <asm/qrwlock.h> > > + > > +#endif /* _ASM_SPINLOCK_H */ > > diff --git a/arch/loongarch/include/asm/spinlock_types.h b/arch/loongarch/include/asm/spinlock_types.h > > new file mode 100644 > > index 000000000000..91f258401ef9 > > --- /dev/null > > +++ b/arch/loongarch/include/asm/spinlock_types.h > > @@ -0,0 +1,11 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (C) 2020-2021 Loongson Technology Corporation Limited > > + */ > > +#ifndef _ASM_SPINLOCK_TYPES_H > > +#define _ASM_SPINLOCK_TYPES_H > > + > > +#include <asm-generic/qspinlock_types.h> > > +#include <asm-generic/qrwlock_types.h> > > + > > +#endif > > Also see the many lkml threads on this, is there big enough loongson to > justify qspinlock? Have you tried a ticket lock? Loongson-3A5000 supports NUMA, we have as many as 16 nodes, 64 cores in total. And we have tried ticket lock which is worse than qspinlock. Maybe Jun Yi (yili0568@gmail.com) can give some performace data?
Huacai
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