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Subject[PATCH v2 1/4] dt-bindings: memory: Add LPDDR2 binding
Date
Add binding for standard LPDDR2 memory chip properties.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
.../memory-controllers/jedec,lpddr2.yaml | 80 +++++++++++++++++++
include/dt-bindings/memory/lpddr2.h | 25 ++++++
2 files changed, 105 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml
create mode 100644 include/dt-bindings/memory/lpddr2.h

diff --git a/Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml
new file mode 100644
index 000000000000..ef227eba1e4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/jedec,lpddr2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: JEDEC LPDDR2 SDRAM
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ jedec,lpddr2-manufacturer-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 255
+ description: |
+ Unique manufacturer ID of SDRAM chip. See MR5 description in JESD209-2.
+
+ jedec,lpddr2-revision-id1:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 255
+ description: |
+ Revision 1 value of SDRAM chip.
+ See MR6 description in chip vendor specification.
+
+ jedec,lpddr2-revision-id2:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 255
+ description: |
+ Revision 2 value of SDRAM chip.
+ See MR7 description in chip vendor specification.
+
+ jedec,lpddr2-density-mbits:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Density in megabits of SDRAM chip. See MR8 description in JESD209-2.
+ enum:
+ - 64
+ - 128
+ - 256
+ - 512
+ - 1024
+ - 2048
+ - 4096
+ - 8192
+ - 16384
+ - 32768
+
+ jedec,lpddr2-io-width-bits:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ IO bus width in bits of SDRAM chip. See MR8 description in JESD209-2.
+ enum:
+ - 32
+ - 16
+ - 8
+
+ jedec,lpddr2-type:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ LPDDR type which corresponds to a number of words SDRAM pre-fetches
+ per column request. See MR8 description in JESD209-2.
+ enum:
+ - 0 # S4 (4 words prefetch architecture)
+ - 1 # S2 (2 words prefetch architecture)
+ - 2 # NVM (Non-volatile memory)
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/memory/lpddr2.h>
+
+ lpddr2 {
+ jedec,lpddr2-manufacturer-id = <LPDDR2_MANID_ELPIDA>;
+ jedec,lpddr2-revision-id1 = <1>;
+ jedec,lpddr2-density-mbits = <2048>;
+ jedec,lpddr2-io-width-bits = <16>;
+ jedec,lpddr2-type = <LPDDR2_TYPE_S4>;
+ };
diff --git a/include/dt-bindings/memory/lpddr2.h b/include/dt-bindings/memory/lpddr2.h
new file mode 100644
index 000000000000..e837b0d8a11e
--- /dev/null
+++ b/include/dt-bindings/memory/lpddr2.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+#ifndef _DT_BINDINGS_LPDDR2_H
+#define _DT_BINDINGS_LPDDR2_H
+
+#define LPDDR2_MANID_SAMSUNG 1
+#define LPDDR2_MANID_QIMONDA 2
+#define LPDDR2_MANID_ELPIDA 3
+#define LPDDR2_MANID_ETRON 4
+#define LPDDR2_MANID_NANYA 5
+#define LPDDR2_MANID_HYNIX 6
+#define LPDDR2_MANID_MOSEL 7
+#define LPDDR2_MANID_WINBOND 8
+#define LPDDR2_MANID_ESMT 9
+#define LPDDR2_MANID_SPANSION 11
+#define LPDDR2_MANID_SST 12
+#define LPDDR2_MANID_ZMOS 13
+#define LPDDR2_MANID_INTEL 14
+#define LPDDR2_MANID_NUMONYX 254
+#define LPDDR2_MANID_MICRON 255
+
+#define LPDDR2_TYPE_S4 0
+#define LPDDR2_TYPE_S2 1
+#define LPDDR2_TYPE_NVM 2
+
+#endif /*_DT_BINDINGS_LPDDR2_H */
--
2.32.0
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