Messages in this thread | | | From | Bhaskara Budiredla <> | Subject | RE: [PATCH v5 4/4] perf/marvell: cn10k DDR perf event core ownership | Date | Mon, 18 Oct 2021 04:37:58 +0000 |
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> >As DDR perf event counters are not per core, so they should be accessed only >by one core at a time. Select new core when previously owning core is going >offline. > >Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> >---
Reviewed-by: Bhaskara Budiredla <bbudiredla@marvell.com>
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