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    Subject[PATCH v4 20/20] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine.
    Date
    Add crypto engine (CE) and CE BAM related nodes and definitions to
    "sm8250.dtsi".

    Cc: Thara Gopinath <thara.gopinath@linaro.org>
    Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
    Cc: Rob Herring <robh+dt@kernel.org>
    Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
    Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
    ---
    arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++++++++++++++++++++++++++++
    1 file changed, 28 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    index 8c15d9fed08f..66cfd0b9c7e3 100644
    --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    @@ -4103,6 +4103,34 @@ cpufreq_hw: cpufreq@18591000 {

    #freq-domain-cells = <1>;
    };
    +
    + cryptobam: dma-controller@1dc4000 {
    + compatible = "qcom,bam-v1.7.0";
    + reg = <0 0x01dc4000 0 0x24000>;
    + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
    + #dma-cells = <1>;
    + qcom,ee = <0>;
    + qcom,controlled-remotely;
    + iommus = <&apps_smmu 0x584 0x0011>,
    + <&apps_smmu 0x586 0x0011>,
    + <&apps_smmu 0x594 0x0011>,
    + <&apps_smmu 0x596 0x0011>;
    + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
    + interconnect-names = "memory";
    + };
    +
    + crypto: crypto@1dfa000 {
    + compatible = "qcom,sm8250-qce";
    + reg = <0 0x01dfa000 0 0x6000>;
    + dmas = <&cryptobam 4>, <&cryptobam 5>;
    + dma-names = "rx", "tx";
    + iommus = <&apps_smmu 0x584 0x0011>,
    + <&apps_smmu 0x586 0x0011>,
    + <&apps_smmu 0x594 0x0011>,
    + <&apps_smmu 0x596 0x0011>;
    + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
    + interconnect-names = "memory";
    + };
    };

    timer {
    --
    2.31.1
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