Messages in this thread | | | From | Richard Zhu <> | Subject | RE: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support | Date | Thu, 14 Oct 2021 01:20:41 +0000 |
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> -----Original Message----- > From: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> > Sent: Wednesday, October 13, 2021 8:46 PM > To: Richard Zhu <hongxing.zhu@nxp.com> > Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>; > l.stach@pengutronix.de; tharvey@gateworks.com; kishon@ti.com; > vkoul@kernel.org; robh@kernel.org; galak@kernel.crashing.org; > shawnguo@kernel.org > Subject: Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support > > On Tue, 2021-10-12 at 16:41 +0800, Richard Zhu wrote: > > i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different > > PHY and allows to output the internal PHY reference clock via the refclk > pad. > > Add the i.MX8MM PCIe support based on the standalone PHY driver. > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > --- > > [...] > > @@ -1130,6 +1176,14 @@ static int imx6_pcie_probe(struct > platform_device *pdev) > > &imx6_pcie->tx_swing_low)) > > imx6_pcie->tx_swing_low = 127; > > > > + /* get PHY refclk pad mode if there is PHY node */ > > + phy_node = of_parse_phandle(node, "phys", 0); > > + if (phy_node) { > > + of_property_read_u32(phy_node, "fsl,refclk-pad-mode", > > + &imx6_pcie->refclk_pad_mode); > > It seems to me that the refclk_pad_mode is not actually used by this driver > anymore, because it is handled by the PHY driver now. Is there a reason to > read this property here at all? > [Richard Zhu] Good caught. I forgot to clean up the refclk_pad_mode in controller driver. Would remove these codes later. Thanks a lot.
Best Regards Richard Zhu
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