Messages in this thread | | | Subject | Re: [RESEND PATCH 1/2] KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit | From | Xiaoyao Li <> | Date | Thu, 28 Jan 2021 15:17:19 +0800 |
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On 1/27/2021 6:04 PM, Paolo Bonzini wrote: > On 27/01/21 04:41, Xiaoyao Li wrote: >> On 1/27/2021 12:31 AM, Paolo Bonzini wrote: >>> On 08/01/21 07:49, Chenyi Qiang wrote: >>>> To avoid breaking the CPUs without bus lock detection, activate the >>>> DR6_BUS_LOCK bit (bit 11) conditionally in DR6_FIXED_1 bits. >>>> >>>> The set/clear of DR6_BUS_LOCK is similar to the DR6_RTM in DR6 >>>> register. The processor clears DR6_BUS_LOCK when bus lock debug >>>> exception is generated. (For all other #DB the processor sets this bit >>>> to 1.) Software #DB handler should set this bit before returning to the >>>> interrupted task. >>>> >>>> For VM exit caused by debug exception, bit 11 of the exit qualification >>>> is set to indicate that a bus lock debug exception condition was >>>> detected. The VMM should emulate the exception by clearing bit 11 of >>>> the >>>> guest DR6. >>> >>> Please rename DR6_INIT to DR6_ACTIVE_LOW, and then a lot of changes >>> become simpler: >> >> Paolo, >> >> What do you want to convey with the new name DR6_ACTIVE_LOW? To be >> honest, the new name is confusing to me. > > "Active low" means that the bit is usually 1 and goes to 0 when the > condition (such as RTM or bus lock) happens. For almost all those DR6 > bits the value is in fact always 1, but if they are defined in the > future it will require no code change.
Why not keep use DR6_INIT, or DR6_RESET_VALUE? or any other better name.
It's just the default clear value of DR6 that no debug condition is hit.
> Paolo > >>>> - dr6 |= DR6_BD | DR6_RTM; >>>> + dr6 |= DR6_BD | DR6_RTM | DR6_BUS_LOCK; >>> >>> dr6 |= DR6_BD | DR6_ACTIVE_LOW; >>> >> >> >
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