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    Subject[PATCH v3 16/22] dt-bindings: media: camss: Add qcom,sdm845-camss binding
    Date
    Add bindings for qcom,sdm845-camss in order to support the camera
    subsystem for SDM845.

    Signed-off-by: Robert Foss <robert.foss@linaro.org>
    ---

    Changes since v2
    - Rob: Removed extra empty lines at end of file
    - Rob: Add new line at end of file
    - Rob: Remove redundant descriptions
    - Rob: Add power domain description
    - Rob: Make clock-lanes a constant
    - Rob: Rework to conform to new port schema
    - Add max & minItems to data-lanes
    - Remove ports requirement - endpoint & reg
    - Add proper commit message
    - Remove Todor as binding maintainer


    .../bindings/media/qcom,sdm845-camss.yaml | 370 ++++++++++++++++++
    1 file changed, 370 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml

    diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml
    new file mode 100644
    index 000000000000..637b9f683bd1
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml
    @@ -0,0 +1,370 @@
    +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    +
    +%YAML 1.2
    +---
    +$id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#"
    +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
    +
    +title: Qualcomm CAMSS ISP
    +
    +maintainers:
    + - Robert Foss <robert.foss@linaro.org>
    +
    +description: |
    + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
    +
    +properties:
    + compatible:
    + const: qcom,sdm845-camss
    +
    + clocks:
    + minItems: 36
    + maxItems: 36
    +
    + clock-names:
    + items:
    + - const: camnoc_axi
    + - const: cpas_ahb
    + - const: cphy_rx_src
    + - const: csi0
    + - const: csi0_src
    + - const: csi1
    + - const: csi1_src
    + - const: csi2
    + - const: csi2_src
    + - const: csiphy0
    + - const: csiphy0_timer
    + - const: csiphy0_timer_src
    + - const: csiphy1
    + - const: csiphy1_timer
    + - const: csiphy1_timer_src
    + - const: csiphy2
    + - const: csiphy2_timer
    + - const: csiphy2_timer_src
    + - const: csiphy3
    + - const: csiphy3_timer
    + - const: csiphy3_timer_src
    + - const: gcc_camera_ahb
    + - const: gcc_camera_axi
    + - const: slow_ahb_src
    + - const: soc_ahb
    + - const: vfe0_axi
    + - const: vfe0
    + - const: vfe0_cphy_rx
    + - const: vfe0_src
    + - const: vfe1_axi
    + - const: vfe1
    + - const: vfe1_cphy_rx
    + - const: vfe1_src
    + - const: vfe_lite
    + - const: vfe_lite_cphy_rx
    + - const: vfe_lite_src
    +
    + interrupts:
    + minItems: 10
    + maxItems: 10
    +
    + interrupt-names:
    + items:
    + - const: csid0
    + - const: csid1
    + - const: csid2
    + - const: csiphy0
    + - const: csiphy1
    + - const: csiphy2
    + - const: csiphy3
    + - const: vfe0
    + - const: vfe1
    + - const: vfe_lite
    +
    + iommus:
    + maxItems: 4
    +
    + power-domains:
    + items:
    + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
    + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
    + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
    +
    + ports:
    + $ref: /schemas/graph.yaml#/properties/ports
    +
    + description:
    + CSI input ports.
    +
    + properties:
    + port@0:
    + $ref: /schemas/graph.yaml#/$defs/port-base
    + unevaluatedProperties: false
    + description:
    + Input port for receiving CSI data.
    +
    + properties:
    + endpoint:
    + $ref: video-interfaces.yaml#
    + unevaluatedProperties: false
    +
    + properties:
    + clock-lanes:
    + maxItems: 1
    +
    + data-lanes:
    + minItems: 1
    + maxItems: 4
    +
    + required:
    + - clock-lanes
    + - data-lanes
    +
    + port@1:
    + $ref: /schemas/graph.yaml#/$defs/port-base
    + unevaluatedProperties: false
    + description:
    + Input port for receiving CSI data.
    +
    + properties:
    + endpoint:
    + $ref: video-interfaces.yaml#
    + unevaluatedProperties: false
    +
    + properties:
    + clock-lanes:
    + maxItems: 1
    +
    + data-lanes:
    + minItems: 1
    + maxItems: 4
    +
    + required:
    + - clock-lanes
    + - data-lanes
    +
    + port@2:
    + $ref: /schemas/graph.yaml#/$defs/port-base
    + unevaluatedProperties: false
    + description:
    + Input port for receiving CSI data.
    +
    + properties:
    + endpoint:
    + $ref: video-interfaces.yaml#
    + unevaluatedProperties: false
    +
    + properties:
    + clock-lanes:
    + maxItems: 1
    +
    + data-lanes:
    + minItems: 1
    + maxItems: 4
    +
    + required:
    + - clock-lanes
    + - data-lanes
    +
    + port@3:
    + $ref: /schemas/graph.yaml#/$defs/port-base
    + unevaluatedProperties: false
    + description:
    + Input port for receiving CSI data.
    +
    + properties:
    + endpoint:
    + $ref: video-interfaces.yaml#
    + unevaluatedProperties: false
    +
    + properties:
    + clock-lanes:
    + maxItems: 1
    +
    + data-lanes:
    + minItems: 1
    + maxItems: 4
    +
    + required:
    + - clock-lanes
    + - data-lanes
    +
    + reg:
    + minItems: 10
    + maxItems: 10
    +
    + reg-names:
    + items:
    + - const: csid0
    + - const: csid1
    + - const: csid2
    + - const: csiphy0
    + - const: csiphy1
    + - const: csiphy2
    + - const: csiphy3
    + - const: vfe0
    + - const: vfe1
    + - const: vfe_lite
    +
    + vdda-supply:
    + description:
    + Definition of the regulator used as analog power supply.
    +
    +required:
    + - clock-names
    + - clocks
    + - compatible
    + - interrupt-names
    + - interrupts
    + - iommus
    + - power-domains
    + - reg
    + - reg-names
    + - vdda-supply
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + #include <dt-bindings/interrupt-controller/arm-gic.h>
    + #include <dt-bindings/clock/qcom,camcc-sdm845.h>
    + #include <dt-bindings/clock/qcom,gcc-sdm845.h>
    +
    + soc {
    + #address-cells = <2>;
    + #size-cells = <2>;
    +
    + camss: camss@a00000 {
    + compatible = "qcom,sdm845-camss";
    +
    + clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
    + <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
    + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
    + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
    + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
    + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
    + <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
    + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
    + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
    + <&clock_camcc CAM_CC_CSIPHY0_CLK>,
    + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
    + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
    + <&clock_camcc CAM_CC_CSIPHY1_CLK>,
    + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
    + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
    + <&clock_camcc CAM_CC_CSIPHY2_CLK>,
    + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
    + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
    + <&clock_camcc CAM_CC_CSIPHY3_CLK>,
    + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
    + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
    + <&gcc GCC_CAMERA_AHB_CLK>,
    + <&gcc GCC_CAMERA_AXI_CLK>,
    + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
    + <&clock_camcc CAM_CC_SOC_AHB_CLK>,
    + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
    + <&clock_camcc CAM_CC_IFE_0_CLK>,
    + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
    + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
    + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
    + <&clock_camcc CAM_CC_IFE_1_CLK>,
    + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
    + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
    + <&clock_camcc CAM_CC_IFE_LITE_CLK>,
    + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
    + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
    +
    + clock-names = "camnoc_axi",
    + "cpas_ahb",
    + "cphy_rx_src",
    + "csi0",
    + "csi0_src",
    + "csi1",
    + "csi1_src",
    + "csi2",
    + "csi2_src",
    + "csiphy0",
    + "csiphy0_timer",
    + "csiphy0_timer_src",
    + "csiphy1",
    + "csiphy1_timer",
    + "csiphy1_timer_src",
    + "csiphy2",
    + "csiphy2_timer",
    + "csiphy2_timer_src",
    + "csiphy3",
    + "csiphy3_timer",
    + "csiphy3_timer_src",
    + "gcc_camera_ahb",
    + "gcc_camera_axi",
    + "slow_ahb_src",
    + "soc_ahb",
    + "vfe0_axi",
    + "vfe0",
    + "vfe0_cphy_rx",
    + "vfe0_src",
    + "vfe1_axi",
    + "vfe1",
    + "vfe1_cphy_rx",
    + "vfe1_src",
    + "vfe_lite",
    + "vfe_lite_cphy_rx",
    + "vfe_lite_src";
    +
    + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
    +
    + interrupt-names = "csid0",
    + "csid1",
    + "csid2",
    + "csiphy0",
    + "csiphy1",
    + "csiphy2",
    + "csiphy3",
    + "vfe0",
    + "vfe1",
    + "vfe_lite";
    +
    + iommus = <&apps_smmu 0x0808 0x0>,
    + <&apps_smmu 0x0810 0x8>,
    + <&apps_smmu 0x0c08 0x0>,
    + <&apps_smmu 0x0c10 0x8>;
    +
    + power-domains = <&clock_camcc IFE_0_GDSC>,
    + <&clock_camcc IFE_1_GDSC>,
    + <&clock_camcc TITAN_TOP_GDSC>;
    +
    + reg = <0 0xacb3000 0 0x1000>,
    + <0 0xacba000 0 0x1000>,
    + <0 0xacc8000 0 0x1000>,
    + <0 0xac65000 0 0x1000>,
    + <0 0xac66000 0 0x1000>,
    + <0 0xac67000 0 0x1000>,
    + <0 0xac68000 0 0x1000>,
    + <0 0xacaf000 0 0x4000>,
    + <0 0xacb6000 0 0x4000>,
    + <0 0xacc4000 0 0x4000>;
    +
    + reg-names = "csid0",
    + "csid1",
    + "csid2",
    + "csiphy0",
    + "csiphy1",
    + "csiphy2",
    + "csiphy3",
    + "vfe0",
    + "vfe1",
    + "vfe_lite";
    +
    + vdda-supply = <&reg_2v8>;
    +
    + ports {
    + #address-cells = <1>;
    + #size-cells = <0>;
    + };
    + };
    + };
    --
    2.27.0
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      Last update: 2021-01-27 17:12    [W:2.435 / U:0.008 seconds]
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