Messages in this thread | | | Date | Wed, 27 Jan 2021 09:23:08 -0600 | From | Bjorn Helgaas <> | Subject | Re: [PATCH] PCI: xilinx-nwl: Enable coherenct PCIe traffic using CCI |
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On Wed, Jan 27, 2021 at 05:03:12AM +0000, Bharat Kumar Gogada wrote: > > On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote:
> Here is the CCI spec > https://developer.arm.com/documentation/ddi0470/k/preface
I'm sure it was obvious, but please include this in the commit log as well.
> > Can you include a URL to a CCI spec? I'm not familiar with it. I > > guess this is something upstream from the host bridge, i.e., > > between the CPU and the host bridge, so it's outside the PCI > > domain?
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