Messages in this thread | | | Subject | Re: [PATCH V2 06/11] dts: bindings: Document device tree bindings for ETE | From | Suzuki K Poulose <> | Date | Mon, 25 Jan 2021 22:20:52 +0000 |
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Hi Rob
On 1/25/21 7:22 PM, Rob Herring wrote: > On Wed, Jan 13, 2021 at 09:48:13AM +0530, Anshuman Khandual wrote: >> From: Suzuki K Poulose <suzuki.poulose@arm.com> >> >> Document the device tree bindings for Embedded Trace Extensions. >> ETE can be connected to legacy coresight components and thus >> could optionally contain a connection graph as described by >> the CoreSight bindings. >> >> Cc: devicetree@vger.kernel.org >> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> >> Cc: Mike Leach <mike.leach@linaro.org> >> Cc: Rob Herring <robh@kernel.org> >> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> >> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> >> --- >> Documentation/devicetree/bindings/arm/ete.yaml | 71 ++++++++++++++++++++++++++ >> 1 file changed, 71 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/ete.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/ete.yaml b/Documentation/devicetree/bindings/arm/ete.yaml >> new file mode 100644 >> index 0000000..00e6a77 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/ete.yaml >> @@ -0,0 +1,71 @@ >> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause >> +# Copyright 2021, Arm Ltd >> +%YAML 1.2 >> +--- >> +$id: "http://devicetree.org/schemas/arm/ete.yaml#" >> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >> + >> +title: ARM Embedded Trace Extensions >> + >> +maintainers: >> + - Suzuki K Poulose <suzuki.poulose@arm.com> >> + - Mathieu Poirier <mathieu.poirier@linaro.org> >> + >> +description: | >> + Arm Embedded Trace Extension(ETE) is a per CPU trace component that >> + allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 >> + architecture and has extended support for future architecture changes. >> + The trace generated by the ETE could be stored via legacy CoreSight >> + components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer >> + Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to >> + legacy CoreSight components, a node must be listed per instance, along >> + with any optional connection graph as per the coresight bindings. >> + See bindings/arm/coresight.txt. >> + >> +properties: >> + $nodename: >> + pattern: "^ete([0-9a-f]+)$" >> + compatible: >> + items: >> + - const: arm,embedded-trace-extension >> + >> + cpu: > > We use 'cpus' in a couple of other places, let's do that here for > consistency.
This is following the existing CoreSight bindings for ETM. The same driver probes both. Also there can only ever be a single CPU for ete/etm. So, we would prefer to keep it aligned with the existing bindings to avoid causing confusion.
> >> + description: | >> + Handle to the cpu this ETE is bound to. >> + $ref: /schemas/types.yaml#/definitions/phandle >> + >> + out-ports: >> + description: | >> + Out put connections from the ETE to legacy CoreSight trace bus. > > Output
Will fix.
> >> + $ref: /schemas/graph.yaml#/properties/ports > > You have to define what each 'port' is if there can be more than 1. If > there's only ever 1 then you just need 'port' though maybe all the > coresight bindings require 'out-ports'. And the port nodes need a $ref > to '/schemas/graph.yaml#/properties/port'.
All CoreSight components require an out-ports and/or in-ports. The ETM/ETE always has one port, but must be under out-ports in line with the CoreSight bindings.
Does this look more apt:
out-ports: description: | Output connection from the ETE to legacy CoreSight trace bus. poperties: port: $ref: /schemas/graph.yaml#/properties/port
Suzuki
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