Messages in this thread | | | Subject | Re: [PATCH V2 1/2] dt-bindings: clk: versaclock5: Add optional load capacitance property | From | Luca Ceresoli <> | Date | Wed, 20 Jan 2021 17:35:03 +0100 |
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Hi Adam,
On 19/01/21 22:21, Adam Ford wrote: > There are two registers which can set the load capacitance for > XTAL1 and XTAL2. These are optional registers when using an > external crystal. Since XTAL1 and XTAL2 will set to the same value, > update the binding to support a single property called > xtal-load-femtofarads. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > V2: No Change > > diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > index 2ac1131fd922..c268debe5b8d 100644 > --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > @@ -59,6 +59,12 @@ properties: > minItems: 1 > maxItems: 2 > > + idt,xtal-load-femtofarads: > + $ref: /schemas/types.yaml#/definitions/uint32
"Vendor specific properties having a standard unit suffix don't need a type." -- Documentation/devicetree/bindings/example-schema.yaml
Overall looks good.
-- Luca
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