Messages in this thread | | | Subject | Re: [PATCH] KVM: x86/pmu: Fix HW_REF_CPU_CYCLES event pseudo-encoding in intel_arch_events[] | From | "Xu, Like" <> | Date | Mon, 18 Jan 2021 12:40:39 +0800 |
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On 2021/1/16 1:30, Sean Christopherson wrote: > On Fri, Jan 15, 2021, Like Xu wrote: >> Ping ? >> >> On 2020/12/30 16:19, Like Xu wrote: >>> The HW_REF_CPU_CYCLES event on the fixed counter 2 is pseudo-encoded as >>> 0x0300 in the intel_perfmon_event_map[]. Correct its usage. >>> >>> Fixes: 62079d8a4312 ("KVM: PMU: add proper support for fixed counter 2") >>> Signed-off-by: Like Xu <like.xu@linux.intel.com> > Reviewed-by: Sean Christopherson <seanjc@google.com> thx. > >>> --- >>> arch/x86/kvm/vmx/pmu_intel.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c >>> index a886a47daebd..013e8d253dfa 100644 >>> --- a/arch/x86/kvm/vmx/pmu_intel.c >>> +++ b/arch/x86/kvm/vmx/pmu_intel.c >>> @@ -29,7 +29,7 @@ static struct kvm_event_hw_type_mapping intel_arch_events[] = { >>> [4] = { 0x2e, 0x41, PERF_COUNT_HW_CACHE_MISSES }, >>> [5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS }, >>> [6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES }, >>> - [7] = { 0x00, 0x30, PERF_COUNT_HW_REF_CPU_CYCLES }, >>> + [7] = { 0x00, 0x03, PERF_COUNT_HW_REF_CPU_CYCLES }, > In a follow up patch, would it be sane/appropriate to define these magic numbers > in asm/perf_event.h and share them between intel_perfmon_event_map and > intel_arch_events? Without this patch, it's not at all obvious that these are > intended to align with the Core (arch?) event definitions.
The asm/perf_event.h is x86 generic and svm has a amd_perfmon_event_map.
How about adding an interface similar to perf_get_x86_pmu_capability() so that we can use magic numbers directly from the host perf ? (it looks we may have a performance drop, compared to static array)
--- thx, likexu
> >>> }; >>> /* mapping between fixed pmc index and intel_arch_events array */
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