Messages in this thread | | | Date | Thu, 14 Jan 2021 11:10:59 -0800 | From | Sean Christopherson <> | Subject | Re: [PATCH v3 00/17] KVM: x86/pmu: Add support to enable Guest PEBS via DS |
| |
On Mon, Jan 04, 2021, Like Xu wrote: > 2) Slow path (part 3, patch 0012-0017) > > This is when the host assigned physical PMC has a different index > from the virtual PMC (e.g. using physical PMC1 to emulate virtual PMC0) > In this case, KVM needs to rewrite the PEBS records to change the > applicable counter indexes to the virtual PMC indexes, which would > otherwise contain the physical counter index written by PEBS facility, > and switch the counter reset values to the offset corresponding to > the physical counter indexes in the DS data structure. > > Large PEBS needs to be disabled by KVM rewriting the > pebs_interrupt_threshold filed in DS to only one record in > the slow path. This is because a guest may implicitly drain PEBS buffer, > e.g., context switch. KVM doesn't get a chance to update the PEBS buffer.
Are the PEBS record write, PEBS index update, and subsequent PMI atomic with respect to instruction execution? If not, doesn't this approach still leave a window where the guest could see the wrong counter?
The virtualization hole is also visible if the guest is reading the PEBS records from a different vCPU, though I assume no sane kernel does that?
> The physical PMC index will confuse the guest. The difficulty comes > when multiple events get rescheduled inside the guest. Hence disabling > large PEBS in this case might be an easy and safe way to keep it corrects > as an initial step here.
| |