Messages in this thread | | | Date | Wed, 13 Jan 2021 20:40:33 +0530 | From | Vinod Koul <> | Subject | Re: [PATCH v2 0/6] STM32 USBPHYC PLL management rework |
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On 05-01-21, 10:05, Amelie Delaunay wrote: > STM32 USBPHYC controls the USB PLL. PLL requires to be powered with 1v1 and 1v8 > supplies. To ensure a good behavior of the PLL, during boot, runtime and > suspend/resume sequences, this series reworks its management to fix regulators > issues and improve PLL status reliability.
Applied, thanks
-- ~Vinod
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