Messages in this thread | | | Date | Tue, 12 Jan 2021 21:31:54 -0600 | From | Rob Herring <> | Subject | Re: [PATCH v2 3/5] dt-bindings: clock: Add Qualcomm A7 PLL binding |
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On Fri, 08 Jan 2021 17:02:31 +0530, Manivannan Sadhasivam wrote: > Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm > platforms like SDX55. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > .../devicetree/bindings/clock/qcom,a7pll.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,a7pll.yaml >
Reviewed-by: Rob Herring <robh@kernel.org>
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