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    Subject[PATCH v4 09/20] dt-bindings: arm: hisilicon: convert hisilicon,pcie-sas-subctrl bindings to json-schema
    Date
    Convert the Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller binding
    to DT schema format using json-schema.

    Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
    ---
    .../controller/hisilicon,pcie-sas-subctrl.txt | 15 ---------
    .../controller/hisilicon,pcie-sas-subctrl.yaml | 37 ++++++++++++++++++++++
    2 files changed, 37 insertions(+), 15 deletions(-)
    delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt
    create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml

    diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt
    deleted file mode 100644
    index 1ef086bda81a3f5..000000000000000
    --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt
    +++ /dev/null
    @@ -1,15 +0,0 @@
    -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller
    -
    -Required properties:
    -- compatible : "hisilicon,pcie-sas-subctrl", "syscon";
    -- reg : Register address and size
    -
    -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
    -HiP05 or HiP06 Soc to implement some basic configurations.
    -
    -Example:
    - /* for HiP05 PCIe-SAS sub system */
    - pcie_sas: system_controller@b0000000 {
    - compatible = "hisilicon,pcie-sas-subctrl", "syscon";
    - reg = <0xb0000000 0x10000>;
    - };
    diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml
    new file mode 100644
    index 000000000000000..2de875ae781cf8a
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml
    @@ -0,0 +1,37 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller
    +
    +maintainers:
    + - Wei Xu <xuwei5@hisilicon.com>
    +
    +description: |
    + The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
    + HiP05 or HiP06 Soc to implement some basic configurations.
    +
    +properties:
    + compatible:
    + items:
    + - const: hisilicon,pcie-sas-subctrl
    + - const: syscon
    +
    + reg:
    + description: Register address and size
    + maxItems: 1
    +
    +required:
    + - compatible
    + - reg
    +
    +examples:
    + - |
    + /* for HiP05 PCIe-SAS sub system */
    + pcie_sas: system_controller@b0000000 {
    + compatible = "hisilicon,pcie-sas-subctrl", "syscon";
    + reg = <0xb0000000 0x10000>;
    + };
    +...
    --
    1.8.3

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