lkml.org 
[lkml]   [2020]   [Sep]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v2 0/3] amd : iommu : Initial IOMMU support for SNP
On Wed, Sep 23, 2020 at 12:13:44PM +0000, Suravee Suthikulpanit wrote:
> Suravee Suthikulpanit (3):
> iommu: amd: Use 4K page for completion wait write-back semaphore
> iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR
> iommu: amd: Re-purpose Exclusion range registers to support SNP CWWB

Applied, thanks. I am slightly concerned about the re-purposing of the
exclusion-range registers based on a feature bit being set. This makes
the hardware incompatible to older IOMMU drivers which do not check the
FEATURE_SNP bit.

It will probably work in this case, as the firmware on systems with
IOMMU-SNP support will not declare exclusion ranges at all and
exclusion-ranges in the IOMMU hardware have been a bad idea since
forever, but it would have been nicer if hardware actually
provided a bit to enable this behavior.

Regards,

Joerg

\
 
 \ /
  Last update: 2020-09-24 12:53    [W:0.161 / U:0.096 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site