Messages in this thread Patch in this message | | | From | Andre Przywara <> | Subject | [PATCH 3/5] perf: arm_spe: Add nested virt event decoding | Date | Tue, 22 Sep 2020 11:12:23 +0100 |
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The ARMv8.4 nested virtualisation extension can redirect system register accesses to a memory page controlled by the hypervisor. The SPE profiling feature in newer implementations can tag those memory accesses accordingly.
Add the bit pattern describing this load/store type, so that the perf tool can decode it properly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index e633bb5b8e65..943e4155b246 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -398,6 +398,10 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, buf += ret; blen -= ret; } + } else if ((payload & 0xfe) == 0x30) { + ret = snprintf(buf, buf_len, " NV-SYSREG"); + buf += ret; + blen -= ret; } else if (payload & 0x4) { ret = snprintf(buf, buf_len, " SIMD-FP"); buf += ret; -- 2.17.1
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