Messages in this thread | | | Subject | Re: [PATCH v2] arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver | From | Srinivasa Rao Mandadapu <> | Date | Fri, 18 Sep 2020 17:21:37 +0530 |
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Thanks Mr. Doug for your time to review this patch!!
On 9/14/2020 11:11 PM, Doug Anderson wrote: > Hi, > > On Tue, Sep 1, 2020 at 9:04 PM Srinivasa Rao Mandadapu > <srivasam@codeaurora.org> wrote: >> From: Ajit Pandey <ajitp@codeaurora.org> >> >> Add the I2S controller node to sc7180 dtsi. >> Add pinmux for primary and secondary I2S. >> >> Signed-off-by: Ajit Pandey <ajitp@codeaurora.org> >> Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org> >> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> >> --- >> >> arch/arm64/boot/dts/qcom/sc7180.dtsi | 69 ++++++++++++++++++++++++++++++++++++ >> 1 file changed, 69 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> index d46b383..db60ca5 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> @@ -676,6 +676,36 @@ >> }; >> }; >> >> + lpass_cpu: lpass@62f00000 { >> + compatible = "qcom,sc7180-lpass-cpu"; >> + >> + reg = <0 0x62f00000 0 0x29000>; >> + reg-names = "lpass-lpaif"; >> + >> + iommus = <&apps_smmu 0x1020 0>; >> + >> + power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; >> + >> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, >> + <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>, >> + <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>, >> + <&lpasscc LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK>, >> + <&lpasscc LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK>, >> + <&lpasscc LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK>; >> + >> + clock-names = "pcnoc-sway-clk", "audio-core", >> + "mclk0", "pcnoc-mport-clk", >> + "mi2s-bit-clk0", "mi2s-bit-clk1"; >> + >> + >> + #sound-dai-cells = <1>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "lpass-irq-lpaif"; >> + }; >> + >> sdhc_1: sdhci@7c4000 { > Your node is still sorted incorrectly. Nodes with unit addresses > should be sorted numerically. > > The number 0x62f00000 is greater than the number 0x7c4000. Thus your > node should not be placed above "sdhci@7c4000". It should be placed > somewhere further down in the file.
Will place it accordingly.
> > >> compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; >> reg = <0 0x7c4000 0 0x1000>, >> @@ -1721,6 +1751,45 @@ >> }; >> }; >> >> + sec_mi2s_active: sec-mi2s-active { >> + pinmux { >> + pins = "gpio49", "gpio50", "gpio51"; >> + function = "mi2s_1"; >> + }; >> + >> + pinconf { >> + pins = "gpio49", "gpio50", "gpio51";; > nit: double-semi-colon.
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