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    SubjectRe: [PATCH v2 2/3] drm/panfrost: add amlogic reset quirk callback
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    On 16/09/2020 16:01, Neil Armstrong wrote:
    > The T820, G31 & G52 GPUs integratewd by Amlogic in the respective GXM, G12A/SM1 & G12B

    NIT: s/integratewd/integrated/

    > SoCs needs a quirk in the PWR registers at the GPU reset time.
    >
    > Since the Amlogic's integration of the GPU cores with the SoC is not
    > publicly documented we do not know what does these
    > values, but they permit having a fully functional GPU running with Panfrost.
    >
    > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

    Reviewed-by: Steven Price <steven.price@arm.com>

    > ---
    > drivers/gpu/drm/panfrost/panfrost_gpu.c | 11 +++++++++++
    > drivers/gpu/drm/panfrost/panfrost_gpu.h | 2 ++
    > drivers/gpu/drm/panfrost/panfrost_regs.h | 4 ++++
    > 3 files changed, 17 insertions(+)
    >
    > diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
    > index a6de78bc1fa8..e1b2a3376624 100644
    > --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
    > +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
    > @@ -76,6 +76,17 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev)
    > return 0;
    > }
    >
    > +void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev)
    > +{
    > + /*
    > + * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs
    > + * these undocumented bits in GPU_PWR_OVERRIDE1 to be set in order
    > + * to operate correctly.
    > + */
    > + gpu_write(pfdev, GPU_PWR_KEY, GPU_PWR_KEY_UNLOCK);
    > + gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16));
    > +}
    > +
    > static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev)
    > {
    > u32 quirks = 0;
    > diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.h b/drivers/gpu/drm/panfrost/panfrost_gpu.h
    > index 4112412087b2..468c51e7e46d 100644
    > --- a/drivers/gpu/drm/panfrost/panfrost_gpu.h
    > +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.h
    > @@ -16,4 +16,6 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev);
    > void panfrost_gpu_power_on(struct panfrost_device *pfdev);
    > void panfrost_gpu_power_off(struct panfrost_device *pfdev);
    >
    > +void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev);
    > +
    > #endif
    > diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h
    > index ea38ac60581c..eddaa62ad8b0 100644
    > --- a/drivers/gpu/drm/panfrost/panfrost_regs.h
    > +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h
    > @@ -51,6 +51,10 @@
    > #define GPU_STATUS 0x34
    > #define GPU_STATUS_PRFCNT_ACTIVE BIT(2)
    > #define GPU_LATEST_FLUSH_ID 0x38
    > +#define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */
    > +#define GPU_PWR_KEY_UNLOCK 0x2968A819
    > +#define GPU_PWR_OVERRIDE0 0x54 /* (RW) Power manager override settings */
    > +#define GPU_PWR_OVERRIDE1 0x58 /* (RW) Power manager override settings */
    > #define GPU_FAULT_STATUS 0x3C
    > #define GPU_FAULT_ADDRESS_LO 0x40
    > #define GPU_FAULT_ADDRESS_HI 0x44
    >

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