Messages in this thread | | | Subject | Re: [PATCH net-next v4 5/5] ravb: Add support for explicit internal clock delay configuration | From | Dan Murphy <> | Date | Thu, 17 Sep 2020 13:49:54 -0500 |
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Geert
On 9/17/20 8:57 AM, Geert Uytterhoeven wrote: > Some EtherAVB variants support internal clock delay configuration, which > can add larger delays than the delays that are typically supported by > the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" > properties). > > Historically, the EtherAVB driver configured these delays based on the > "rgmii-*id" PHY mode. This caused issues with PHY drivers that > implement PHY internal delays properly[1]. Hence a backwards-compatible > workaround was added by masking the PHY mode[2]. > > Add proper support for explicit configuration of the MAC internal clock > delays using the new "[rt]x-internal-delay-ps" properties. > Fall back to the old handling if none of these properties is present. > > [1] Commit bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support for > the KSZ9031 PHY") > [2] Commit 9b23203c32ee02cd ("ravb: Mask PHY mode to avoid inserting > delays twice"). > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> > --- > v4: > - Add Reviewed-by, > > v3: > - No changes, > > v2: > - Add Reviewed-by, > - Split long line, > - Replace "renesas,[rt]xc-delay-ps" by "[rt]x-internal-delay-ps", > - Use 1 instead of true when assigning to a single-bit bitfield. > --- > drivers/net/ethernet/renesas/ravb.h | 1 + > drivers/net/ethernet/renesas/ravb_main.c | 36 ++++++++++++++++++------ > 2 files changed, 28 insertions(+), 9 deletions(-) > > diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h > index e5ca12ce93c730a9..7453b17a37a2c8d0 100644 > --- a/drivers/net/ethernet/renesas/ravb.h > +++ b/drivers/net/ethernet/renesas/ravb.h > @@ -1038,6 +1038,7 @@ struct ravb_private { > unsigned wol_enabled:1; > unsigned rxcidm:1; /* RX Clock Internal Delay Mode */ > unsigned txcidm:1; /* TX Clock Internal Delay Mode */ > + unsigned rgmii_override:1; /* Deprecated rgmii-*id behavior */ > int num_tx_desc; /* TX descriptors per packet */ > }; > > diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c > index 59dadd971345e0d1..aa120e3f1e4d4da5 100644 > --- a/drivers/net/ethernet/renesas/ravb_main.c > +++ b/drivers/net/ethernet/renesas/ravb_main.c > @@ -1034,11 +1034,8 @@ static int ravb_phy_init(struct net_device *ndev) > pn = of_node_get(np); > } > > - iface = priv->phy_interface; > - if (priv->chip_id != RCAR_GEN2 && phy_interface_mode_is_rgmii(iface)) { > - /* ravb_set_delay_mode() takes care of internal delay mode */ > - iface = PHY_INTERFACE_MODE_RGMII; > - } > + iface = priv->rgmii_override ? PHY_INTERFACE_MODE_RGMII > + : priv->phy_interface; > phydev = of_phy_connect(ndev, pn, ravb_adjust_link, 0, iface); > of_node_put(pn); > if (!phydev) { > @@ -1989,20 +1986,41 @@ static const struct soc_device_attribute ravb_delay_mode_quirk_match[] = { > }; > > /* Set tx and rx clock internal delay modes */ > -static void ravb_parse_delay_mode(struct net_device *ndev) > +static void ravb_parse_delay_mode(struct device_node *np, struct net_device *ndev) > { > struct ravb_private *priv = netdev_priv(ndev); > + bool explicit_delay = false; > + u32 delay; > + > + if (!of_property_read_u32(np, "rx-internal-delay-ps", &delay)) { > + /* Valid values are 0 and 1800, according to DT bindings */ > + priv->rxcidm = !!delay; > + explicit_delay = true; > + } > + if (!of_property_read_u32(np, "tx-internal-delay-ps", &delay)) { > + /* Valid values are 0 and 2000, according to DT bindings */ > + priv->txcidm = !!delay; > + explicit_delay = true; > + } There are helper functions for this
s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, const int *delay_values, int size, bool is_rx)
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